2017-09-19 15:40:11 +08:00
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; RUN: opt -O1 -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-internalize-symbols < %s | FileCheck -check-prefix=ALL -check-prefix=OPT %s
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; RUN: opt -O0 -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-internalize-symbols < %s | FileCheck -check-prefix=ALL -check-prefix=OPTNONE %s
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2017-01-31 05:05:18 +08:00
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2017-09-19 15:40:11 +08:00
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; OPT-NOT: gvar_unused
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; OPTNONE: gvar_unused
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2017-01-31 05:05:18 +08:00
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@gvar_unused = addrspace(1) global i32 undef, align 4
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2017-09-19 15:40:11 +08:00
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; ALL: gvar_used
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2017-01-31 05:05:18 +08:00
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@gvar_used = addrspace(1) global i32 undef, align 4
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2017-09-19 15:40:11 +08:00
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; ALL: define internal fastcc void @func_used(
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define fastcc void @func_used(i32 addrspace(1)* %out, i32 %tid) #1 {
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entry:
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store volatile i32 %tid, i32 addrspace(1)* %out
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ret void
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}
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; ALL: define internal fastcc void @func_used_noinline(
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define fastcc void @func_used_noinline(i32 addrspace(1)* %out, i32 %tid) #2 {
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entry:
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store volatile i32 %tid, i32 addrspace(1)* %out
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ret void
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}
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; OPTNONE: define internal fastcc void @func_used_alwaysinline(
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; OPT-NOT: @func_used_alwaysinline
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define fastcc void @func_used_alwaysinline(i32 addrspace(1)* %out, i32 %tid) #3 {
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2017-01-31 05:05:18 +08:00
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entry:
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2017-09-19 15:40:11 +08:00
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store volatile i32 %tid, i32 addrspace(1)* %out
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2017-01-31 05:05:18 +08:00
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ret void
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}
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2017-09-19 15:40:11 +08:00
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; OPTNONE: define internal void @func_unused(
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; OPT-NOT: @func_unused
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define void @func_unused(i32 addrspace(1)* %out, i32 %tid) #2 {
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2017-01-31 05:05:18 +08:00
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entry:
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2017-09-19 15:40:11 +08:00
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store volatile i32 %tid, i32 addrspace(1)* %out
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2017-01-31 05:05:18 +08:00
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ret void
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}
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2017-09-19 15:40:11 +08:00
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; ALL: define amdgpu_kernel void @kernel_unused(
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define amdgpu_kernel void @kernel_unused(i32 addrspace(1)* %out) #1 {
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entry:
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store volatile i32 1, i32 addrspace(1)* %out
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ret void
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}
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; ALL: define amdgpu_kernel void @main_kernel()
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; ALL: tail call i32 @llvm.amdgcn.workitem.id.x
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; ALL: tail call fastcc void @func_used
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; ALL: tail call fastcc void @func_used_noinline
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; ALL: store volatile
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; ALL: ret void
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2017-01-31 05:05:18 +08:00
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define amdgpu_kernel void @main_kernel() {
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entry:
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2017-09-19 15:40:11 +08:00
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x()
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tail call fastcc void @func_used(i32 addrspace(1)* @gvar_used, i32 %tid)
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tail call fastcc void @func_used_noinline(i32 addrspace(1)* @gvar_used, i32 %tid)
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tail call fastcc void @func_used_alwaysinline(i32 addrspace(1)* @gvar_used, i32 %tid)
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2017-01-31 05:05:18 +08:00
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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attributes #0 = { nounwind readnone }
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2017-09-19 15:40:11 +08:00
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attributes #1 = { nounwind }
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attributes #2 = { noinline nounwind }
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attributes #3 = { alwaysinline nounwind }
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