2004-07-02 13:46:10 +08:00
|
|
|
//===-- UnreachableBlockElim.cpp - Remove unreachable blocks for codegen --===//
|
2005-04-22 06:36:52 +08:00
|
|
|
//
|
2019-01-19 16:50:56 +08:00
|
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
2005-04-22 06:36:52 +08:00
|
|
|
//
|
2004-07-02 13:46:10 +08:00
|
|
|
//===----------------------------------------------------------------------===//
|
2005-04-22 06:36:52 +08:00
|
|
|
//
|
2004-07-02 13:46:10 +08:00
|
|
|
// This pass is an extremely simple version of the SimplifyCFG pass. Its sole
|
|
|
|
// job is to delete LLVM basic blocks that are not reachable from the entry
|
|
|
|
// node. To do this, it performs a simple depth first traversal of the CFG,
|
|
|
|
// then deletes any unvisited nodes.
|
|
|
|
//
|
|
|
|
// Note that this pass is really a hack. In particular, the instruction
|
|
|
|
// selectors for various targets should just not generate code for unreachable
|
|
|
|
// blocks. Until LLVM has a more systematic way of defining instruction
|
|
|
|
// selectors, however, we cannot really expect them to handle additional
|
|
|
|
// complexity.
|
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|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
2016-07-08 11:32:49 +08:00
|
|
|
#include "llvm/CodeGen/UnreachableBlockElim.h"
|
2012-12-04 00:50:05 +08:00
|
|
|
#include "llvm/ADT/DepthFirstIterator.h"
|
|
|
|
#include "llvm/ADT/SmallPtrSet.h"
|
2009-08-01 08:34:30 +08:00
|
|
|
#include "llvm/CodeGen/MachineDominators.h"
|
2008-08-05 07:54:43 +08:00
|
|
|
#include "llvm/CodeGen/MachineFunctionPass.h"
|
2017-04-29 05:56:33 +08:00
|
|
|
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
2009-08-01 08:34:30 +08:00
|
|
|
#include "llvm/CodeGen/MachineLoopInfo.h"
|
2012-12-04 00:50:05 +08:00
|
|
|
#include "llvm/CodeGen/MachineModuleInfo.h"
|
2008-08-06 05:40:45 +08:00
|
|
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
2016-07-08 11:32:49 +08:00
|
|
|
#include "llvm/CodeGen/Passes.h"
|
2017-11-08 09:01:31 +08:00
|
|
|
#include "llvm/CodeGen/TargetInstrInfo.h"
|
2014-03-04 19:45:46 +08:00
|
|
|
#include "llvm/IR/CFG.h"
|
2013-01-02 19:36:10 +08:00
|
|
|
#include "llvm/IR/Constant.h"
|
2014-01-13 17:26:24 +08:00
|
|
|
#include "llvm/IR/Dominators.h"
|
2013-01-02 19:36:10 +08:00
|
|
|
#include "llvm/IR/Function.h"
|
|
|
|
#include "llvm/IR/Instructions.h"
|
|
|
|
#include "llvm/IR/Type.h"
|
2012-12-04 00:50:05 +08:00
|
|
|
#include "llvm/Pass.h"
|
2019-03-08 04:40:55 +08:00
|
|
|
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
|
2004-07-02 13:46:10 +08:00
|
|
|
using namespace llvm;
|
|
|
|
|
2016-07-08 11:32:49 +08:00
|
|
|
namespace {
|
|
|
|
class UnreachableBlockElimLegacyPass : public FunctionPass {
|
|
|
|
bool runOnFunction(Function &F) override {
|
2019-03-12 01:51:57 +08:00
|
|
|
return llvm::EliminateUnreachableBlocks(F);
|
2016-07-08 11:32:49 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
public:
|
|
|
|
static char ID; // Pass identification, replacement for typeid
|
|
|
|
UnreachableBlockElimLegacyPass() : FunctionPass(ID) {
|
|
|
|
initializeUnreachableBlockElimLegacyPassPass(
|
|
|
|
*PassRegistry::getPassRegistry());
|
|
|
|
}
|
|
|
|
|
|
|
|
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
|
|
|
AU.addPreserved<DominatorTreeWrapperPass>();
|
|
|
|
}
|
|
|
|
};
|
|
|
|
}
|
|
|
|
char UnreachableBlockElimLegacyPass::ID = 0;
|
|
|
|
INITIALIZE_PASS(UnreachableBlockElimLegacyPass, "unreachableblockelim",
|
|
|
|
"Remove unreachable blocks from the CFG", false, false)
|
|
|
|
|
|
|
|
FunctionPass *llvm::createUnreachableBlockEliminationPass() {
|
|
|
|
return new UnreachableBlockElimLegacyPass();
|
|
|
|
}
|
|
|
|
|
|
|
|
PreservedAnalyses UnreachableBlockElimPass::run(Function &F,
|
|
|
|
FunctionAnalysisManager &AM) {
|
2019-03-12 01:51:57 +08:00
|
|
|
bool Changed = llvm::EliminateUnreachableBlocks(F);
|
2016-07-08 11:32:49 +08:00
|
|
|
if (!Changed)
|
|
|
|
return PreservedAnalyses::all();
|
|
|
|
PreservedAnalyses PA;
|
|
|
|
PA.preserve<DominatorTreeAnalysis>();
|
|
|
|
return PA;
|
|
|
|
}
|
2008-08-05 07:54:43 +08:00
|
|
|
|
|
|
|
namespace {
|
2009-10-25 14:33:48 +08:00
|
|
|
class UnreachableMachineBlockElim : public MachineFunctionPass {
|
2014-03-07 17:26:03 +08:00
|
|
|
bool runOnMachineFunction(MachineFunction &F) override;
|
|
|
|
void getAnalysisUsage(AnalysisUsage &AU) const override;
|
2008-11-01 04:08:30 +08:00
|
|
|
MachineModuleInfo *MMI;
|
2008-08-05 07:54:43 +08:00
|
|
|
public:
|
|
|
|
static char ID; // Pass identification, replacement for typeid
|
2010-08-07 02:33:48 +08:00
|
|
|
UnreachableMachineBlockElim() : MachineFunctionPass(ID) {}
|
2008-08-05 07:54:43 +08:00
|
|
|
};
|
|
|
|
}
|
|
|
|
char UnreachableMachineBlockElim::ID = 0;
|
|
|
|
|
2010-08-24 01:52:01 +08:00
|
|
|
INITIALIZE_PASS(UnreachableMachineBlockElim, "unreachable-mbb-elimination",
|
2010-10-08 06:25:06 +08:00
|
|
|
"Remove unreachable machine basic blocks", false, false)
|
2008-08-05 07:54:43 +08:00
|
|
|
|
2010-08-07 02:33:48 +08:00
|
|
|
char &llvm::UnreachableMachineBlockElimID = UnreachableMachineBlockElim::ID;
|
2008-08-05 07:54:43 +08:00
|
|
|
|
2009-08-01 08:34:30 +08:00
|
|
|
void UnreachableMachineBlockElim::getAnalysisUsage(AnalysisUsage &AU) const {
|
|
|
|
AU.addPreserved<MachineLoopInfo>();
|
|
|
|
AU.addPreserved<MachineDominatorTree>();
|
|
|
|
MachineFunctionPass::getAnalysisUsage(AU);
|
|
|
|
}
|
|
|
|
|
2008-08-05 07:54:43 +08:00
|
|
|
bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) {
|
2016-10-06 05:36:16 +08:00
|
|
|
df_iterator_default_set<MachineBasicBlock*> Reachable;
|
2010-09-30 04:57:19 +08:00
|
|
|
bool ModifiedPHI = false;
|
2008-08-05 07:54:43 +08:00
|
|
|
|
2009-01-28 21:14:17 +08:00
|
|
|
MMI = getAnalysisIfAvailable<MachineModuleInfo>();
|
2009-08-01 08:34:30 +08:00
|
|
|
MachineDominatorTree *MDT = getAnalysisIfAvailable<MachineDominatorTree>();
|
|
|
|
MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2008-08-05 07:54:43 +08:00
|
|
|
// Mark all reachable blocks.
|
2014-08-25 07:23:06 +08:00
|
|
|
for (MachineBasicBlock *BB : depth_first_ext(&F, Reachable))
|
|
|
|
(void)BB/* Mark all reachable blocks */;
|
2008-08-05 07:54:43 +08:00
|
|
|
|
|
|
|
// Loop over all dead blocks, remembering them and deleting all instructions
|
|
|
|
// in them.
|
|
|
|
std::vector<MachineBasicBlock*> DeadBlocks;
|
2008-08-07 07:16:52 +08:00
|
|
|
for (MachineFunction::iterator I = F.begin(), E = F.end(); I != E; ++I) {
|
2015-10-10 06:56:24 +08:00
|
|
|
MachineBasicBlock *BB = &*I;
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2008-08-07 07:16:52 +08:00
|
|
|
// Test for deadness.
|
|
|
|
if (!Reachable.count(BB)) {
|
2008-08-05 07:54:43 +08:00
|
|
|
DeadBlocks.push_back(BB);
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2009-08-01 08:34:30 +08:00
|
|
|
// Update dominator and loop info.
|
|
|
|
if (MLI) MLI->removeBlock(BB);
|
|
|
|
if (MDT && MDT->getNode(BB)) MDT->eraseNode(BB);
|
|
|
|
|
2008-08-05 07:54:43 +08:00
|
|
|
while (BB->succ_begin() != BB->succ_end()) {
|
|
|
|
MachineBasicBlock* succ = *BB->succ_begin();
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2008-08-05 07:54:43 +08:00
|
|
|
MachineBasicBlock::iterator start = succ->begin();
|
2010-02-10 03:54:29 +08:00
|
|
|
while (start != succ->end() && start->isPHI()) {
|
2008-08-05 07:54:43 +08:00
|
|
|
for (unsigned i = start->getNumOperands() - 1; i >= 2; i-=2)
|
2008-10-03 23:45:36 +08:00
|
|
|
if (start->getOperand(i).isMBB() &&
|
2008-08-05 07:54:43 +08:00
|
|
|
start->getOperand(i).getMBB() == BB) {
|
|
|
|
start->RemoveOperand(i);
|
|
|
|
start->RemoveOperand(i-1);
|
|
|
|
}
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2008-08-07 07:16:52 +08:00
|
|
|
start++;
|
2008-08-05 07:54:43 +08:00
|
|
|
}
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2008-08-05 07:54:43 +08:00
|
|
|
BB->removeSuccessor(BB->succ_begin());
|
|
|
|
}
|
|
|
|
}
|
2008-08-07 07:16:52 +08:00
|
|
|
}
|
2004-07-02 13:46:10 +08:00
|
|
|
|
|
|
|
// Actually remove the blocks now.
|
[DebugInfo] Remove call sites when eliminating unreachable blocks
Summary:
When eliminating an unreachable block we must remove any call site
information for calls residing in the block.
This was originally found on a downstream target, and the attached x86
test case was produced by hand-modifying some MIR.
Reviewers: aprantl, asowda, NikolaPrica, djtodoro, ivanbaev, vsk
Reviewed By: NikolaPrica, vsk
Subscribers: vsk, hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D64500
llvm-svn: 368566
2019-08-12 21:22:29 +08:00
|
|
|
for (unsigned i = 0, e = DeadBlocks.size(); i != e; ++i) {
|
|
|
|
// Remove any call site information for calls in the block.
|
|
|
|
for (auto &I : DeadBlocks[i]->instrs())
|
|
|
|
if (I.isCall(MachineInstr::IgnoreBundle))
|
|
|
|
DeadBlocks[i]->getParent()->updateCallSiteInfo(&I);
|
|
|
|
|
2010-03-14 10:24:55 +08:00
|
|
|
DeadBlocks[i]->eraseFromParent();
|
[DebugInfo] Remove call sites when eliminating unreachable blocks
Summary:
When eliminating an unreachable block we must remove any call site
information for calls residing in the block.
This was originally found on a downstream target, and the attached x86
test case was produced by hand-modifying some MIR.
Reviewers: aprantl, asowda, NikolaPrica, djtodoro, ivanbaev, vsk
Reviewed By: NikolaPrica, vsk
Subscribers: vsk, hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D64500
llvm-svn: 368566
2019-08-12 21:22:29 +08:00
|
|
|
}
|
2004-07-02 13:46:10 +08:00
|
|
|
|
2008-08-07 07:16:52 +08:00
|
|
|
// Cleanup PHI nodes.
|
|
|
|
for (MachineFunction::iterator I = F.begin(), E = F.end(); I != E; ++I) {
|
2015-10-10 06:56:24 +08:00
|
|
|
MachineBasicBlock *BB = &*I;
|
2008-08-07 07:16:52 +08:00
|
|
|
// Prune unneeded PHI entries.
|
2008-11-01 04:08:30 +08:00
|
|
|
SmallPtrSet<MachineBasicBlock*, 8> preds(BB->pred_begin(),
|
2008-08-07 07:16:52 +08:00
|
|
|
BB->pred_end());
|
|
|
|
MachineBasicBlock::iterator phi = BB->begin();
|
2010-02-10 03:54:29 +08:00
|
|
|
while (phi != BB->end() && phi->isPHI()) {
|
2008-08-09 02:00:05 +08:00
|
|
|
for (unsigned i = phi->getNumOperands() - 1; i >= 2; i-=2)
|
|
|
|
if (!preds.count(phi->getOperand(i).getMBB())) {
|
|
|
|
phi->RemoveOperand(i);
|
|
|
|
phi->RemoveOperand(i-1);
|
2010-09-30 04:57:19 +08:00
|
|
|
ModifiedPHI = true;
|
2008-08-09 02:00:05 +08:00
|
|
|
}
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2008-08-07 07:16:52 +08:00
|
|
|
if (phi->getNumOperands() == 3) {
|
2017-04-29 05:56:33 +08:00
|
|
|
const MachineOperand &Input = phi->getOperand(1);
|
|
|
|
const MachineOperand &Output = phi->getOperand(0);
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Summary:
This clang-tidy check is looking for unsigned integer variables whose initializer
starts with an implicit cast from llvm::Register and changes the type of the
variable to llvm::Register (dropping the llvm:: where possible).
Partial reverts in:
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&
MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register
PPCFastISel.cpp - No Register::operator-=()
PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&
MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor
Manual fixups in:
ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&
HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register
HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.
PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&
Depends on D65919
Reviewers: arsenm, bogner, craig.topper, RKSimon
Reviewed By: arsenm
Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65962
llvm-svn: 369041
2019-08-16 03:22:08 +08:00
|
|
|
Register InputReg = Input.getReg();
|
|
|
|
Register OutputReg = Output.getReg();
|
2017-04-29 05:56:33 +08:00
|
|
|
assert(Output.getSubReg() == 0 && "Cannot have output subregister");
|
2010-09-30 04:57:19 +08:00
|
|
|
ModifiedPHI = true;
|
2008-08-07 07:16:52 +08:00
|
|
|
|
2017-04-29 05:56:33 +08:00
|
|
|
if (InputReg != OutputReg) {
|
2011-05-27 13:04:51 +08:00
|
|
|
MachineRegisterInfo &MRI = F.getRegInfo();
|
2017-04-29 05:56:33 +08:00
|
|
|
unsigned InputSub = Input.getSubReg();
|
2017-05-10 14:33:43 +08:00
|
|
|
if (InputSub == 0 &&
|
Recommit [UnreachableBlockElim] Use COPY if PHI input is undef
This time invoking llc with "-march=x86-64" in the testcase, so we don't assume
the default target is x86.
Summary:
If we have
%vreg0<def> = PHI %vreg2<undef>, <BB#0>, %vreg3, <BB#2>; GR32:%vreg0,%vreg2,%vreg3
%vreg3<def,tied1> = ADD32ri8 %vreg0<kill,tied0>, 1, %EFLAGS<imp-def>; GR32:%vreg3,%vreg0
then we can't just change %vreg0 into %vreg3, since %vreg2 is actually
undef. We would have to also copy the undef flag to be able to change the
register.
Instead we deal with this case like other cases where we can't just
replace the register: we insert a COPY. The code creating the COPY already
copied all flags from the PHI input, so the undef flag will be transferred
as it should.
Reviewers: kparzysz
Reviewed By: kparzysz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38235
llvm-svn: 314882
2017-10-04 15:42:45 +08:00
|
|
|
MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg)) &&
|
|
|
|
!Input.isUndef()) {
|
2017-04-29 05:56:33 +08:00
|
|
|
MRI.replaceRegWith(OutputReg, InputReg);
|
|
|
|
} else {
|
2017-05-10 14:33:43 +08:00
|
|
|
// The input register to the PHI has a subregister or it can't be
|
Recommit [UnreachableBlockElim] Use COPY if PHI input is undef
This time invoking llc with "-march=x86-64" in the testcase, so we don't assume
the default target is x86.
Summary:
If we have
%vreg0<def> = PHI %vreg2<undef>, <BB#0>, %vreg3, <BB#2>; GR32:%vreg0,%vreg2,%vreg3
%vreg3<def,tied1> = ADD32ri8 %vreg0<kill,tied0>, 1, %EFLAGS<imp-def>; GR32:%vreg3,%vreg0
then we can't just change %vreg0 into %vreg3, since %vreg2 is actually
undef. We would have to also copy the undef flag to be able to change the
register.
Instead we deal with this case like other cases where we can't just
replace the register: we insert a COPY. The code creating the COPY already
copied all flags from the PHI input, so the undef flag will be transferred
as it should.
Reviewers: kparzysz
Reviewed By: kparzysz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38235
llvm-svn: 314882
2017-10-04 15:42:45 +08:00
|
|
|
// constrained to the proper register class or it is undef:
|
2017-04-29 05:56:33 +08:00
|
|
|
// insert a COPY instead of simply replacing the output
|
|
|
|
// with the input.
|
|
|
|
const TargetInstrInfo *TII = F.getSubtarget().getInstrInfo();
|
|
|
|
BuildMI(*BB, BB->getFirstNonPHI(), phi->getDebugLoc(),
|
|
|
|
TII->get(TargetOpcode::COPY), OutputReg)
|
|
|
|
.addReg(InputReg, getRegState(Input), InputSub);
|
|
|
|
}
|
|
|
|
phi++->eraseFromParent();
|
2011-05-27 13:04:51 +08:00
|
|
|
}
|
2008-08-07 07:16:52 +08:00
|
|
|
continue;
|
|
|
|
}
|
2008-11-01 04:08:30 +08:00
|
|
|
|
2008-08-07 07:16:52 +08:00
|
|
|
++phi;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-08-05 08:30:10 +08:00
|
|
|
F.RenumberBlocks();
|
|
|
|
|
2015-01-15 19:41:30 +08:00
|
|
|
return (!DeadBlocks.empty() || ModifiedPHI);
|
2004-07-02 13:46:10 +08:00
|
|
|
}
|