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llvm-project/libunwind/include/__libunwind_config.h

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libunwind: Introduce __libunwind_config.h. Introduce __libunwind_config.h to avoid cross repository circular dependency with libcxxabi. llvm-svn: 242642
2015-07-19 23:23:10 +08:00
//===------------------------- __libunwind_config.h -----------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is dual licensed under the MIT and the University of Illinois Open
// Source Licenses. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef ____LIBUNWIND_CONFIG_H__
#define ____LIBUNWIND_CONFIG_H__
#if defined(__arm__) && !defined(__USING_SJLJ_EXCEPTIONS__) && \
!defined(__ARM_DWARF_EH__)
[libunwind] Clean up macro usage. Convention in libunwind is to use !defined(FOOT) not !FOO. Differential Revision: https://reviews.llvm.org/D31078 llvm-svn: 299225
2017-03-31 23:28:06 +08:00
#define _LIBUNWIND_ARM_EHABI
libunwind: Introduce __libunwind_config.h. Introduce __libunwind_config.h to avoid cross repository circular dependency with libcxxabi. llvm-svn: 242642
2015-07-19 23:23:10 +08:00
#endif
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86 8
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64 32
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC 112
[PPC64] Added vector registers. The Registers_ppc64 class needed a couple of changes, both to accommodate the new registers as well as to handle the overlaps of VS register set without wasting space. The save/restore code of V and VS registers was added. As VS registers depend on the VMX extension, they are processed only if VMX support is detected (_ARCH_PWR8 for now). Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D41906 llvm-svn: 322596
2018-01-17 04:54:10 +08:00
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC64 116
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64 95
Fix building for ARM with dwarf exception handling The previous definition of _LIBUNWIND_HIGHEST_DWARF_REGISTER seems to be a copy of the ARM64 value (introduced in SVN r276128); since the code actually hasn't compiled properly for arm in dwarf mode before, this hasn't actually been used. Set it to the correct value based on the UNW_ARM_* enum values. The iwmmx control variables have to be made mutable, since they are touched from within getRegister (which previously wasn't const), and getRegister is used on a const Registers object in DwarfInstructions.hpp. Differential Revision: https://reviews.llvm.org/D39251 llvm-svn: 317192
2017-11-02 16:16:16 +08:00
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM 287
[OR1K] Add the EPCR special-purpose register to register state. This makes it possible to unwind hardware exception stack frames, which necessarily save every register and so need an extra column for storing the return address. CFI for the exception handler could then look as follows: .globl exception_vector exception_vector: .cfi_startproc .cfi_signal_frame .cfi_return_column 32 l.addi r1, r1, -0x100 .cfi_def_cfa_offset 0x100 l.sw 0x00(r1), r2 .cfi_offset 2, 0x00-0x100 l.sw 0x04(r1), r3 .cfi_offset 3, 0x04-0x100 l.sw 0x08(r1), r4 .cfi_offset 4, 0x08-0x100 l.mfspr r3, r0, SPR_EPCR_BASE l.sw 0x78(r1), r3 .cfi_offset 32, 0x78-0x100 l.jal exception_handler l.nop l.lwz r2, 0x00(r1) l.lwz r3, 0x04(r1) l.lwz r4, 0x08(r1) l.jr r9 l.nop .cfi_endproc This register could, of course, also be accessed by the trace callback or personality function, if so desired. llvm-svn: 332513
2018-05-17 03:09:48 +08:00
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K 32
[libunwind][MIPS]: Add support for unwinding in O32 and N64 processes. This supports the soft-float ABI only and has been tested with both clang and gcc on FreeBSD. Reviewed By: sdardis, compnerd Differential Revision: https://reviews.llvm.org/D38110 llvm-svn: 320528
2017-12-13 05:43:36 +08:00
#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS 65
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
#if defined(_LIBUNWIND_IS_NATIVE_ONLY)
# if defined(__i386__)
[libunwind] Clean up macro usage. Convention in libunwind is to use !defined(FOOT) not !FOO. Differential Revision: https://reviews.llvm.org/D31078 llvm-svn: 299225
2017-03-31 23:28:06 +08:00
# define _LIBUNWIND_TARGET_I386
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# define _LIBUNWIND_CONTEXT_SIZE 8
Change unw_word_t to always have the same size as the pointer size This matches the original libunwind API. This also unifies the type between ARM EHABI and the other configurations, and allows getting rid of a number of casts in log messages. The cursor size updates for ppc and or1k are untested, but unw_proc_info_t shrinks by 4 uint64_t units on i386 at least. Differential Revision: https://reviews.llvm.org/D39365 llvm-svn: 316942
2017-10-31 03:06:34 +08:00
# define _LIBUNWIND_CURSOR_SIZE 15
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# elif defined(__x86_64__)
# define _LIBUNWIND_TARGET_X86_64 1
Add support for dwarf unwinding on windows on x86_64 Clang doesn't currently support building for windows/x86_64 with dwarf by setting command line parameters, but if manually modified to use dwarf, we can make libunwind work in this configuration as well. Also include i386 in the docs when adding this as a supported configuration; libunwind already works for i386 windows, but can fail due to an issue unrelated to windows itself. Differential Revision: https://reviews.llvm.org/D38819 llvm-svn: 316747
2017-10-27 16:11:36 +08:00
# if defined(_WIN64)
# define _LIBUNWIND_CONTEXT_SIZE 54
Add support for SEH unwinding on Windows. Summary: I've tested this implementation on x86-64 to ensure that it works. All `libc++abi` tests pass, as do all `libc++` exception-related tests. ARM still remains to be implemented (@compnerd?). Special thanks to KJK::Hyperion for his excellent series of articles on how EH works on x86-64 Windows. (Seriously, check it out. It's awesome.) I'm actually not sure if this should go in as is. I particularly don't like that I duplicated the UnwindCursor class for this special case. Reviewers: mstorsjo, rnk, compnerd, smeenai, javed.absar Subscribers: mgorny, kristof.beyls, christof, chrib, cfe-commits, compnerd, llvm-commits Differential Revision: https://reviews.llvm.org/D50564 llvm-svn: 341125
2018-08-31 05:29:00 +08:00
# ifdef __SEH__
# define _LIBUNWIND_CURSOR_SIZE 204
# else
# define _LIBUNWIND_CURSOR_SIZE 66
# endif
Add support for dwarf unwinding on windows on x86_64 Clang doesn't currently support building for windows/x86_64 with dwarf by setting command line parameters, but if manually modified to use dwarf, we can make libunwind work in this configuration as well. Also include i386 in the docs when adding this as a supported configuration; libunwind already works for i386 windows, but can fail due to an issue unrelated to windows itself. Differential Revision: https://reviews.llvm.org/D38819 llvm-svn: 316747
2017-10-27 16:11:36 +08:00
# else
# define _LIBUNWIND_CONTEXT_SIZE 21
# define _LIBUNWIND_CURSOR_SIZE 33
# endif
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64
Reland [PPC64] Port to ppc64le - initial version Initial working version of libunwind for PowerPC 64. Tested on little-endian ppc64 host only. Based on the existing PowerPC 32 code. It supports: - context save/restore (unw_getcontext, unw_init_local, unw_resume) - read/write from/to saved registers - backtrace (unw_step) Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D41386 Now builds with LIBUNWIND_ENABLE_CROSS_UNWINDING=ON should work. llvm-svn: 321680
2018-01-03 06:11:30 +08:00
# elif defined(__powerpc64__)
# define _LIBUNWIND_TARGET_PPC64 1
[PPC64] Added vector registers. The Registers_ppc64 class needed a couple of changes, both to accommodate the new registers as well as to handle the overlaps of VS register set without wasting space. The save/restore code of V and VS registers was added. As VS registers depend on the VMX extension, they are processed only if VMX support is detected (_ARCH_PWR8 for now). Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D41906 llvm-svn: 322596
2018-01-17 04:54:10 +08:00
# define _LIBUNWIND_CONTEXT_SIZE 167
# define _LIBUNWIND_CURSOR_SIZE 179
Reland [PPC64] Port to ppc64le - initial version Initial working version of libunwind for PowerPC 64. Tested on little-endian ppc64 host only. Based on the existing PowerPC 32 code. It supports: - context save/restore (unw_getcontext, unw_init_local, unw_resume) - read/write from/to saved registers - backtrace (unw_step) Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D41386 Now builds with LIBUNWIND_ENABLE_CROSS_UNWINDING=ON should work. llvm-svn: 321680
2018-01-03 06:11:30 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC64
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# elif defined(__ppc__)
# define _LIBUNWIND_TARGET_PPC 1
# define _LIBUNWIND_CONTEXT_SIZE 117
Change unw_word_t to always have the same size as the pointer size This matches the original libunwind API. This also unifies the type between ARM EHABI and the other configurations, and allows getting rid of a number of casts in log messages. The cursor size updates for ppc and or1k are untested, but unw_proc_info_t shrinks by 4 uint64_t units on i386 at least. Differential Revision: https://reviews.llvm.org/D39365 llvm-svn: 316942
2017-10-31 03:06:34 +08:00
# define _LIBUNWIND_CURSOR_SIZE 124
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# elif defined(__aarch64__)
# define _LIBUNWIND_TARGET_AARCH64 1
# define _LIBUNWIND_CONTEXT_SIZE 66
# define _LIBUNWIND_CURSOR_SIZE 78
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# elif defined(__arm__)
# define _LIBUNWIND_TARGET_ARM 1
Add support for SEH unwinding on Windows. Summary: I've tested this implementation on x86-64 to ensure that it works. All `libc++abi` tests pass, as do all `libc++` exception-related tests. ARM still remains to be implemented (@compnerd?). Special thanks to KJK::Hyperion for his excellent series of articles on how EH works on x86-64 Windows. (Seriously, check it out. It's awesome.) I'm actually not sure if this should go in as is. I particularly don't like that I duplicated the UnwindCursor class for this special case. Reviewers: mstorsjo, rnk, compnerd, smeenai, javed.absar Subscribers: mgorny, kristof.beyls, christof, chrib, cfe-commits, compnerd, llvm-commits Differential Revision: https://reviews.llvm.org/D50564 llvm-svn: 341125
2018-08-31 05:29:00 +08:00
# if defined(__SEH__)
# define _LIBUNWIND_CONTEXT_SIZE 42
Fix existing code for SEH on ARM to compile correctly Even though SEH for ARM is incomplete, make what code already exists at least compile correctly. The _LIBUNWIND_CURSOR_SIZE wasn't correct. ARM (and AArch64) have a DISPATCHER_CONTEXT field named TargetPc instead of TargetIp. For the libunwind.h UNW_* constants, there is no UNW_ARM_PC, only UNW_ARM_IP. Don't use 'r' as loop variable when 'r' already is a Registers_arm member. Differential Revision: https://reviews.llvm.org/D51530 llvm-svn: 341217
2018-08-31 22:56:55 +08:00
# define _LIBUNWIND_CURSOR_SIZE 80
Add support for SEH unwinding on Windows. Summary: I've tested this implementation on x86-64 to ensure that it works. All `libc++abi` tests pass, as do all `libc++` exception-related tests. ARM still remains to be implemented (@compnerd?). Special thanks to KJK::Hyperion for his excellent series of articles on how EH works on x86-64 Windows. (Seriously, check it out. It's awesome.) I'm actually not sure if this should go in as is. I particularly don't like that I duplicated the UnwindCursor class for this special case. Reviewers: mstorsjo, rnk, compnerd, smeenai, javed.absar Subscribers: mgorny, kristof.beyls, christof, chrib, cfe-commits, compnerd, llvm-commits Differential Revision: https://reviews.llvm.org/D50564 llvm-svn: 341125
2018-08-31 05:29:00 +08:00
# elif defined(__ARM_WMMX)
Fix the context/cursor size for ARM with WMMX enabled This was missed in SVN r274744 when the WMMX part was made optional; when made optional, some struct fields were reordered, which caused the total struct size to grow due to padding/alignment. llvm-svn: 316559
2017-10-25 16:07:19 +08:00
# define _LIBUNWIND_CONTEXT_SIZE 61
# define _LIBUNWIND_CURSOR_SIZE 68
[libunwind][ARM] Improve unwinder stack usage - Make WMMX support optional These registers are only available on a limited set of ARM targets (those based on XScale). Other targets should not have to pay the cost of these. This patch shaves off about ~300 bytes of stack usage and ~1KB of code-size. Differential revision: http://reviews.llvm.org/D21991 Reviewers: bcraig, compnerd Change-Id: I2d7a1911a193bd70b123e78747e1a7d1482463c7 llvm-svn: 274744
2016-07-07 18:55:39 +08:00
# else
# define _LIBUNWIND_CONTEXT_SIZE 42
# define _LIBUNWIND_CURSOR_SIZE 49
# endif
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# elif defined(__or1k__)
# define _LIBUNWIND_TARGET_OR1K 1
# define _LIBUNWIND_CONTEXT_SIZE 16
Change unw_word_t to always have the same size as the pointer size This matches the original libunwind API. This also unifies the type between ARM EHABI and the other configurations, and allows getting rid of a number of casts in log messages. The cursor size updates for ppc and or1k are untested, but unw_proc_info_t shrinks by 4 uint64_t units on i386 at least. Differential Revision: https://reviews.llvm.org/D39365 llvm-svn: 316942
2017-10-31 03:06:34 +08:00
# define _LIBUNWIND_CURSOR_SIZE 24
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
2017-10-29 04:19:49 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K
[libunwind][MIPS]: Add support for unwinding in O32 and N64 processes. This supports the soft-float ABI only and has been tested with both clang and gcc on FreeBSD. Reviewed By: sdardis, compnerd Differential Revision: https://reviews.llvm.org/D38110 llvm-svn: 320528
2017-12-13 05:43:36 +08:00
# elif defined(__mips__)
[libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs. Summary: For MIPS ABIs with 64-bit floating point registers including newabi and O32 with 64-bit floating point registers, just save and restore the 32 floating-point registers as doubles. For O32 MIPS with 32-bit floating-point registers, save and restore the individual floating-point registers as "plain" registers. These registers are encoded as floats rather than doubles, but the DWARF unwinder assumes that floating-point registers are stored as doubles when reading them from memory (via AddressSpace::getDouble()). Treating the registers as "normal" registers instead causes the DWARF unwinder to fetch them from memory as a 32-bit register. This does mean that for O32 with 32-bit floating-point registers unw_get_fpreg() and unw_set_fpreg() do not work. One would have to use unw_get_reg() and unw_set_reg() instead. However, DWARF unwinding works correctly as the DWARF CFI emits records for individual 32-bit floating-point registers even when they are treated as doubles stored in paired registers. If the lack of unw_get/set_fpreg() becomes a pressing need in the future for O32 MIPS we could add in special handling to make it work. Reviewers: sdardis, compnerd Reviewed By: sdardis Differential Revision: https://reviews.llvm.org/D41968 llvm-svn: 332414
2018-05-16 06:44:56 +08:00
# if defined(_ABIO32) && _MIPS_SIM == _ABIO32
[libunwind][MIPS]: Add support for unwinding in O32 and N64 processes. This supports the soft-float ABI only and has been tested with both clang and gcc on FreeBSD. Reviewed By: sdardis, compnerd Differential Revision: https://reviews.llvm.org/D38110 llvm-svn: 320528
2017-12-13 05:43:36 +08:00
# define _LIBUNWIND_TARGET_MIPS_O32 1
[libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs. Summary: For MIPS ABIs with 64-bit floating point registers including newabi and O32 with 64-bit floating point registers, just save and restore the 32 floating-point registers as doubles. For O32 MIPS with 32-bit floating-point registers, save and restore the individual floating-point registers as "plain" registers. These registers are encoded as floats rather than doubles, but the DWARF unwinder assumes that floating-point registers are stored as doubles when reading them from memory (via AddressSpace::getDouble()). Treating the registers as "normal" registers instead causes the DWARF unwinder to fetch them from memory as a 32-bit register. This does mean that for O32 with 32-bit floating-point registers unw_get_fpreg() and unw_set_fpreg() do not work. One would have to use unw_get_reg() and unw_set_reg() instead. However, DWARF unwinding works correctly as the DWARF CFI emits records for individual 32-bit floating-point registers even when they are treated as doubles stored in paired registers. If the lack of unw_get/set_fpreg() becomes a pressing need in the future for O32 MIPS we could add in special handling to make it work. Reviewers: sdardis, compnerd Reviewed By: sdardis Differential Revision: https://reviews.llvm.org/D41968 llvm-svn: 332414
2018-05-16 06:44:56 +08:00
# if defined(__mips_hard_float)
# define _LIBUNWIND_CONTEXT_SIZE 50
# define _LIBUNWIND_CURSOR_SIZE 57
# else
# define _LIBUNWIND_CONTEXT_SIZE 18
# define _LIBUNWIND_CURSOR_SIZE 24
# endif
# elif defined(_ABIN32) && _MIPS_SIM == _ABIN32
[libunwind][MIPS]: Add support for unwinding in N32 processes. Summary: N32 uses the same register context as N64. However, N32 requires one change to properly fetch addresses from registers stored in memory. Since N32 is an ILP32 platform, getP() only fetches the first 32-bits of a stored register. For a big-endian platform this fetches the upper 32-bits which will be zero. To fix this, add a new getRegister() method to AddressSpace which is responsible for extracting the address stored in a register in memory. This matches getP() for all current ABIs except for N32 where it reads the 64-bit register and returns the low 32-bits as an address. The DwarfInstructions::getSavedRegister() method uses AddressSpace::getRegister() instead of AddressSpace::getP(). Reviewers: sdardis, compnerd Reviewed By: sdardis Differential Revision: https://reviews.llvm.org/D39074 llvm-svn: 326250
2018-02-28 05:24:02 +08:00
# define _LIBUNWIND_TARGET_MIPS_NEWABI 1
[libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs. Summary: For MIPS ABIs with 64-bit floating point registers including newabi and O32 with 64-bit floating point registers, just save and restore the 32 floating-point registers as doubles. For O32 MIPS with 32-bit floating-point registers, save and restore the individual floating-point registers as "plain" registers. These registers are encoded as floats rather than doubles, but the DWARF unwinder assumes that floating-point registers are stored as doubles when reading them from memory (via AddressSpace::getDouble()). Treating the registers as "normal" registers instead causes the DWARF unwinder to fetch them from memory as a 32-bit register. This does mean that for O32 with 32-bit floating-point registers unw_get_fpreg() and unw_set_fpreg() do not work. One would have to use unw_get_reg() and unw_set_reg() instead. However, DWARF unwinding works correctly as the DWARF CFI emits records for individual 32-bit floating-point registers even when they are treated as doubles stored in paired registers. If the lack of unw_get/set_fpreg() becomes a pressing need in the future for O32 MIPS we could add in special handling to make it work. Reviewers: sdardis, compnerd Reviewed By: sdardis Differential Revision: https://reviews.llvm.org/D41968 llvm-svn: 332414
2018-05-16 06:44:56 +08:00
# if defined(__mips_hard_float)
# define _LIBUNWIND_CONTEXT_SIZE 67
# define _LIBUNWIND_CURSOR_SIZE 74
# else
# define _LIBUNWIND_CONTEXT_SIZE 35
# define _LIBUNWIND_CURSOR_SIZE 42
# endif
# elif defined(_ABI64) && _MIPS_SIM == _ABI64
[libunwind][MIPS]: Rename Registers_mips_n64 to Registers_mips_newabi. This is in preparation for adding support for N32 unwinding which reuses the newabi register class. Reviewed By: compnerd Differential Revision: https://reviews.llvm.org/D41842 llvm-svn: 322093
2018-01-10 01:07:18 +08:00
# define _LIBUNWIND_TARGET_MIPS_NEWABI 1
[libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs. Summary: For MIPS ABIs with 64-bit floating point registers including newabi and O32 with 64-bit floating point registers, just save and restore the 32 floating-point registers as doubles. For O32 MIPS with 32-bit floating-point registers, save and restore the individual floating-point registers as "plain" registers. These registers are encoded as floats rather than doubles, but the DWARF unwinder assumes that floating-point registers are stored as doubles when reading them from memory (via AddressSpace::getDouble()). Treating the registers as "normal" registers instead causes the DWARF unwinder to fetch them from memory as a 32-bit register. This does mean that for O32 with 32-bit floating-point registers unw_get_fpreg() and unw_set_fpreg() do not work. One would have to use unw_get_reg() and unw_set_reg() instead. However, DWARF unwinding works correctly as the DWARF CFI emits records for individual 32-bit floating-point registers even when they are treated as doubles stored in paired registers. If the lack of unw_get/set_fpreg() becomes a pressing need in the future for O32 MIPS we could add in special handling to make it work. Reviewers: sdardis, compnerd Reviewed By: sdardis Differential Revision: https://reviews.llvm.org/D41968 llvm-svn: 332414
2018-05-16 06:44:56 +08:00
# if defined(__mips_hard_float)
# define _LIBUNWIND_CONTEXT_SIZE 67
# define _LIBUNWIND_CURSOR_SIZE 79
# else
# define _LIBUNWIND_CONTEXT_SIZE 35
# define _LIBUNWIND_CURSOR_SIZE 47
# endif
[libunwind][MIPS]: Add support for unwinding in O32 and N64 processes. This supports the soft-float ABI only and has been tested with both clang and gcc on FreeBSD. Reviewed By: sdardis, compnerd Differential Revision: https://reviews.llvm.org/D38110 llvm-svn: 320528
2017-12-13 05:43:36 +08:00
# else
# error "Unsupported MIPS ABI and/or environment"
# endif
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# else
# error "Unsupported architecture."
# endif
#else // !_LIBUNWIND_IS_NATIVE_ONLY
[libunwind] Clean up macro usage. Convention in libunwind is to use !defined(FOOT) not !FOO. Differential Revision: https://reviews.llvm.org/D31078 llvm-svn: 299225
2017-03-31 23:28:06 +08:00
# define _LIBUNWIND_TARGET_I386
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# define _LIBUNWIND_TARGET_X86_64 1
# define _LIBUNWIND_TARGET_PPC 1
Reland [PPC64] Port to ppc64le - initial version Initial working version of libunwind for PowerPC 64. Tested on little-endian ppc64 host only. Based on the existing PowerPC 32 code. It supports: - context save/restore (unw_getcontext, unw_init_local, unw_resume) - read/write from/to saved registers - backtrace (unw_step) Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D41386 Now builds with LIBUNWIND_ENABLE_CROSS_UNWINDING=ON should work. llvm-svn: 321680
2018-01-03 06:11:30 +08:00
# define _LIBUNWIND_TARGET_PPC64 1
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
# define _LIBUNWIND_TARGET_AARCH64 1
# define _LIBUNWIND_TARGET_ARM 1
# define _LIBUNWIND_TARGET_OR1K 1
[libunwind][MIPS]: Add support for unwinding in O32 and N64 processes. This supports the soft-float ABI only and has been tested with both clang and gcc on FreeBSD. Reviewed By: sdardis, compnerd Differential Revision: https://reviews.llvm.org/D38110 llvm-svn: 320528
2017-12-13 05:43:36 +08:00
# define _LIBUNWIND_TARGET_MIPS_O32 1
[libunwind][MIPS]: Rename Registers_mips_n64 to Registers_mips_newabi. This is in preparation for adding support for N32 unwinding which reuses the newabi register class. Reviewed By: compnerd Differential Revision: https://reviews.llvm.org/D41842 llvm-svn: 322093
2018-01-10 01:07:18 +08:00
# define _LIBUNWIND_TARGET_MIPS_NEWABI 1
[PPC64] Added vector registers. The Registers_ppc64 class needed a couple of changes, both to accommodate the new registers as well as to handle the overlaps of VS register set without wasting space. The save/restore code of V and VS registers was added. As VS registers depend on the VMX extension, they are processed only if VMX support is detected (_ARCH_PWR8 for now). Patch by Leandro Lupori! Differential Revision: https://reviews.llvm.org/D41906 llvm-svn: 322596
2018-01-17 04:54:10 +08:00
# define _LIBUNWIND_CONTEXT_SIZE 167
# define _LIBUNWIND_CURSOR_SIZE 179
Fix building for ARM with dwarf exception handling The previous definition of _LIBUNWIND_HIGHEST_DWARF_REGISTER seems to be a copy of the ARM64 value (introduced in SVN r276128); since the code actually hasn't compiled properly for arm in dwarf mode before, this hasn't actually been used. Set it to the correct value based on the UNW_ARM_* enum values. The iwmmx control variables have to be made mutable, since they are touched from within getRegister (which previously wasn't const), and getRegister is used on a const Registers object in DwarfInstructions.hpp. Differential Revision: https://reviews.llvm.org/D39251 llvm-svn: 317192
2017-11-02 16:16:16 +08:00
# define _LIBUNWIND_HIGHEST_DWARF_REGISTER 287
Introduce a native-only unwinder build. Currently libunwind is built to support cross-unwinding [1] by default, which requires the buffers unw_context_t and unw_cursor_t to be large enough to hold the vritual register set (VRS) of any supported architecture. This is not desirable for some platforms where the stack usage of the unwinder needs to be kept to a minimum (e.g. bare-metal targets). The current patch introduces a native-only (-DLIBUNWIND_ENABLE_CROSS_UNWINDING=OFF) unwinder variant that adopts strict sizes for the buffers unw_context_t and unw_cursor_t depending on the target architecture. [1] http://www.nongnu.org/libunwind/man/libunwind(3).html#section_4 Change-Id: I380fff9a56c16a0fc520e3b1d8454a34b4a48373 llvm-svn: 270692
2016-05-25 20:36:34 +08:00
#endif // _LIBUNWIND_IS_NATIVE_ONLY
libunwind: Introduce __libunwind_config.h. Introduce __libunwind_config.h to avoid cross repository circular dependency with libcxxabi. llvm-svn: 242642
2015-07-19 23:23:10 +08:00
#endif // ____LIBUNWIND_CONFIG_H__