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llvm-project/llvm/test/CodeGen/AArch64/eliminate-trunc.ll

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AArch64/ARM64: move ARM64 into AArch64's place This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
2014-05-24 20:50:23 +08:00
; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-apple-ios7.0 -mcpu=cyclone | FileCheck %s
[AArch64] Implement the isTruncateFree API. In AArch64 i64 to i32 truncate operation is a subregister access. This allows more opportunities for LSR optmization to eliminate variables of different types (i32 and i64). llvm-svn: 205925
2014-04-10 04:43:40 +08:00
; Check trunc i64 operation is translated as a subregister access
; eliminating an i32 induction varible.
AArch64/ARM64: add more arm64 lines to AArch64 regression tests llvm-svn: 206282
2014-04-15 21:59:44 +08:00
AArch64/ARM64: move ARM64 into AArch64's place This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
2014-05-24 20:50:23 +08:00
; CHECK-NOT: add {{x[0-9]+}}, {{x[0-9]+}}, #1
; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #1
; CHECK-NEXT: cmp {{w[0-9]+}}, {{w[0-9]+}}
AArch64/ARM64: add more arm64 lines to AArch64 regression tests llvm-svn: 206282
2014-04-15 21:59:44 +08:00
define void @test1_signed([8 x i8]* nocapture %a, i8* nocapture readonly %box, i8 %limit) minsize {
[AArch64] Implement the isTruncateFree API. In AArch64 i64 to i32 truncate operation is a subregister access. This allows more opportunities for LSR optmization to eliminate variables of different types (i32 and i64). llvm-svn: 205925
2014-04-10 04:43:40 +08:00
entry:
%conv = zext i8 %limit to i32
%cmp223 = icmp eq i8 %limit, 0
br i1 %cmp223, label %for.end15, label %for.body4.lr.ph.us
for.body4.us:
%indvars.iv = phi i64 [ 0, %for.body4.lr.ph.us ], [ %indvars.iv.next, %for.body4.us ]
%arrayidx6.us = getelementptr inbounds [8 x i8]* %a, i64 %indvars.iv26, i64 %indvars.iv
%0 = load i8* %arrayidx6.us, align 1
%idxprom7.us = zext i8 %0 to i64
%arrayidx8.us = getelementptr inbounds i8* %box, i64 %idxprom7.us
%1 = load i8* %arrayidx8.us, align 1
store i8 %1, i8* %arrayidx6.us, align 1
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%2 = trunc i64 %indvars.iv.next to i32
%cmp2.us = icmp slt i32 %2, %conv
br i1 %cmp2.us, label %for.body4.us, label %for.cond1.for.inc13_crit_edge.us
for.body4.lr.ph.us:
%indvars.iv26 = phi i64 [ %indvars.iv.next27, %for.cond1.for.inc13_crit_edge.us ], [ 0, %entry ]
br label %for.body4.us
for.cond1.for.inc13_crit_edge.us:
%indvars.iv.next27 = add nuw nsw i64 %indvars.iv26, 1
%exitcond28 = icmp eq i64 %indvars.iv26, 3
br i1 %exitcond28, label %for.end15, label %for.body4.lr.ph.us
for.end15:
ret void
}