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//===- CodeGenInstruction.h - Instruction Class Wrapper ---------*- C++ -*-===//
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2005-04-22 08:00:37 +08:00
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//
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2004-08-01 13:04:00 +08:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-30 04:37:13 +08:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-22 08:00:37 +08:00
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//
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2004-08-01 13:04:00 +08:00
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//===----------------------------------------------------------------------===//
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//
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// This file defines a wrapper class for the 'Instruction' TableGen class.
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//
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//===----------------------------------------------------------------------===//
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2014-08-14 00:26:38 +08:00
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#ifndef LLVM_UTILS_TABLEGEN_CODEGENINSTRUCTION_H
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#define LLVM_UTILS_TABLEGEN_CODEGENINSTRUCTION_H
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2010-11-06 14:39:47 +08:00
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Support/MachineValueType.h"
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#include "llvm/Support/SMLoc.h"
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#include <string>
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#include <utility>
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#include <vector>
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2004-08-01 13:04:00 +08:00
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namespace llvm {
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template <typename T> class ArrayRef;
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class Record;
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class DagInit;
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class CodeGenTarget;
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class CGIOperandList {
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public:
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class ConstraintInfo {
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enum { None, EarlyClobber, Tied } Kind;
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unsigned OtherTiedOperand;
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public:
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ConstraintInfo() : Kind(None) {}
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static ConstraintInfo getEarlyClobber() {
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ConstraintInfo I;
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I.Kind = EarlyClobber;
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I.OtherTiedOperand = 0;
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return I;
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}
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static ConstraintInfo getTied(unsigned Op) {
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ConstraintInfo I;
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I.Kind = Tied;
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I.OtherTiedOperand = Op;
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return I;
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}
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bool isNone() const { return Kind == None; }
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bool isEarlyClobber() const { return Kind == EarlyClobber; }
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bool isTied() const { return Kind == Tied; }
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unsigned getTiedOperand() const {
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assert(isTied());
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return OtherTiedOperand;
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}
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};
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/// OperandInfo - The information we keep track of for each operand in the
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/// operand list for a tablegen instruction.
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struct OperandInfo {
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/// Rec - The definition this operand is declared as.
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///
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Record *Rec;
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/// Name - If this operand was assigned a symbolic name, this is it,
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/// otherwise, it's empty.
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std::string Name;
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/// PrinterMethodName - The method used to print operands of this type in
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/// the asmprinter.
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std::string PrinterMethodName;
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/// EncoderMethodName - The method used to get the machine operand value
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/// for binary encoding. "getMachineOpValue" by default.
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std::string EncoderMethodName;
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/// OperandType - A value from MCOI::OperandType representing the type of
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/// the operand.
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std::string OperandType;
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/// MIOperandNo - Currently (this is meant to be phased out), some logical
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/// operands correspond to multiple MachineInstr operands. In the X86
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/// target for example, one address operand is represented as 4
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/// MachineOperands. Because of this, the operand number in the
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/// OperandList may not match the MachineInstr operand num. Until it
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/// does, this contains the MI operand index of this operand.
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unsigned MIOperandNo;
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unsigned MINumOperands; // The number of operands.
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2006-11-16 07:23:02 +08:00
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/// DoNotEncode - Bools are set to true in this vector for each operand in
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/// the DisableEncoding list. These should not be emitted by the code
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/// emitter.
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std::vector<bool> DoNotEncode;
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/// MIOperandInfo - Default MI operand type. Note an operand may be made
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/// up of multiple MI operands.
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DagInit *MIOperandInfo;
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/// Constraint info for this operand. This operand can have pieces, so we
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/// track constraint info for each.
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std::vector<ConstraintInfo> Constraints;
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OperandInfo(Record *R, const std::string &N, const std::string &PMN,
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const std::string &EMN, const std::string &OT, unsigned MION,
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unsigned MINO, DagInit *MIOI)
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: Rec(R), Name(N), PrinterMethodName(PMN), EncoderMethodName(EMN),
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OperandType(OT), MIOperandNo(MION), MINumOperands(MINO),
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MIOperandInfo(MIOI) {}
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2010-11-03 06:55:03 +08:00
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/// getTiedOperand - If this operand is tied to another one, return the
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/// other operand number. Otherwise, return -1.
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int getTiedRegister() const {
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for (unsigned j = 0, e = Constraints.size(); j != e; ++j) {
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const CGIOperandList::ConstraintInfo &CI = Constraints[j];
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if (CI.isTied()) return CI.getTiedOperand();
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}
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return -1;
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}
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};
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CGIOperandList(Record *D);
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Record *TheDef; // The actual record containing this OperandList.
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2010-03-19 04:50:52 +08:00
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/// NumDefs - Number of def operands declared, this is the number of
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/// elements in the instruction's (outs) list.
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Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
llvm-svn: 40033
2007-07-19 09:14:50 +08:00
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///
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unsigned NumDefs;
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/// OperandList - The list of declared operands, along with their declared
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/// type (which is a record).
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std::vector<OperandInfo> OperandList;
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// Information gleaned from the operand list.
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bool isPredicable;
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bool hasOptionalDef;
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bool isVariadic;
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// Provide transparent accessors to the operand list.
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bool empty() const { return OperandList.empty(); }
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unsigned size() const { return OperandList.size(); }
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const OperandInfo &operator[](unsigned i) const { return OperandList[i]; }
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OperandInfo &operator[](unsigned i) { return OperandList[i]; }
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OperandInfo &back() { return OperandList.back(); }
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const OperandInfo &back() const { return OperandList.back(); }
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2014-04-18 10:08:58 +08:00
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typedef std::vector<OperandInfo>::iterator iterator;
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typedef std::vector<OperandInfo>::const_iterator const_iterator;
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iterator begin() { return OperandList.begin(); }
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const_iterator begin() const { return OperandList.begin(); }
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iterator end() { return OperandList.end(); }
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const_iterator end() const { return OperandList.end(); }
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2010-11-01 12:03:32 +08:00
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/// getOperandNamed - Return the index of the operand with the specified
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/// non-empty name. If the instruction does not have an operand with the
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2012-10-26 04:33:17 +08:00
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/// specified name, abort.
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2010-11-01 12:03:32 +08:00
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unsigned getOperandNamed(StringRef Name) const;
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2010-11-01 12:03:32 +08:00
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/// hasOperandNamed - Query whether the instruction has an operand of the
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/// given name. If so, return true and set OpIdx to the index of the
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/// operand. Otherwise, return false.
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bool hasOperandNamed(StringRef Name, unsigned &OpIdx) const;
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2006-11-15 10:38:17 +08:00
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/// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
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/// where $foo is a whole operand and $foo.bar refers to a suboperand.
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2012-10-26 04:33:17 +08:00
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/// This aborts if the name is invalid. If AllowWholeOp is true, references
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/// to operands with suboperands are allowed, otherwise not.
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2006-11-15 10:38:17 +08:00
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std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op,
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bool AllowWholeOp = true);
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2011-03-15 01:32:49 +08:00
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2006-11-15 10:38:17 +08:00
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/// getFlattenedOperandNumber - Flatten a operand/suboperand pair into a
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/// flat machineinstr operand #.
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unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const {
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return OperandList[Op.first].MIOperandNo + Op.second;
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}
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2006-11-16 07:23:02 +08:00
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/// getSubOperandNumber - Unflatten a operand number into an
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/// operand/suboperand pair.
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std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const {
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for (unsigned i = 0; ; ++i) {
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assert(i < OperandList.size() && "Invalid flat operand #");
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if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op)
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return std::make_pair(i, Op-OperandList[i].MIOperandNo);
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}
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}
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2011-03-15 01:32:49 +08:00
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2006-11-16 07:23:02 +08:00
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/// isFlatOperandNotEmitted - Return true if the specified flat operand #
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/// should not be emitted with the code emitter.
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bool isFlatOperandNotEmitted(unsigned FlatOpNo) const {
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std::pair<unsigned,unsigned> Op = getSubOperandNumber(FlatOpNo);
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if (OperandList[Op.first].DoNotEncode.size() > Op.second)
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return OperandList[Op.first].DoNotEncode[Op.second];
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return false;
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}
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2011-03-15 01:32:49 +08:00
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2010-11-01 12:03:32 +08:00
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void ProcessDisableEncoding(std::string Value);
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};
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2011-03-15 01:32:49 +08:00
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2004-08-01 13:04:00 +08:00
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2010-11-01 12:03:32 +08:00
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class CodeGenInstruction {
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public:
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Record *TheDef; // The actual record defining this instruction.
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2017-07-07 14:22:35 +08:00
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StringRef Namespace; // The namespace the instruction is in.
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2004-08-01 15:42:39 +08:00
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2010-11-01 12:03:32 +08:00
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/// AsmString - The format string used to emit a .s file for the
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/// instruction.
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std::string AsmString;
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2010-10-09 02:09:59 +08:00
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2010-11-01 12:03:32 +08:00
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/// Operands - This is information about the (ins) and (outs) list specified
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/// to the instruction.
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CGIOperandList Operands;
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/// ImplicitDefs/ImplicitUses - These are lists of registers that are
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/// implicitly defined and used by the instruction.
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std::vector<Record*> ImplicitDefs, ImplicitUses;
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// Various boolean values we track for the instruction.
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2014-02-05 17:10:40 +08:00
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bool isReturn : 1;
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bool isBranch : 1;
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bool isIndirectBranch : 1;
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bool isCompare : 1;
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bool isMoveImm : 1;
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bool isBitcast : 1;
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bool isSelect : 1;
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bool isBarrier : 1;
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bool isCall : 1;
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2016-09-14 16:20:03 +08:00
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bool isAdd : 1;
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2014-02-05 17:10:40 +08:00
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bool canFoldAsLoad : 1;
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bool mayLoad : 1;
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bool mayLoad_Unset : 1;
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bool mayStore : 1;
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bool mayStore_Unset : 1;
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bool isPredicable : 1;
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bool isConvertibleToThreeAddress : 1;
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bool isCommutable : 1;
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bool isTerminator : 1;
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bool isReMaterializable : 1;
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bool hasDelaySlot : 1;
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bool usesCustomInserter : 1;
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bool hasPostISelHook : 1;
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bool hasCtrlDep : 1;
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bool isNotDuplicable : 1;
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bool hasSideEffects : 1;
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bool hasSideEffects_Unset : 1;
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bool isAsCheapAsAMove : 1;
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bool hasExtraSrcRegAllocReq : 1;
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bool hasExtraDefRegAllocReq : 1;
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bool isCodeGenOnly : 1;
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bool isPseudo : 1;
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2014-08-12 06:17:14 +08:00
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bool isRegSequence : 1;
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2014-08-21 05:51:26 +08:00
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bool isExtractSubreg : 1;
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2014-08-21 07:49:36 +08:00
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bool isInsertSubreg : 1;
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2015-05-29 02:33:39 +08:00
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bool isConvergent : 1;
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2016-03-02 04:03:11 +08:00
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bool hasNoSchedulingInfo : 1;
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2018-05-22 22:36:58 +08:00
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bool FastISelShouldIgnore : 1;
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2010-11-01 12:03:32 +08:00
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2013-09-12 18:28:05 +08:00
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std::string DeprecatedReason;
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bool HasComplexDeprecationPredicate;
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2012-08-24 08:31:16 +08:00
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/// Are there any undefined flags?
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bool hasUndefFlags() const {
|
|
|
|
return mayLoad_Unset || mayStore_Unset || hasSideEffects_Unset;
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|
}
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// The record used to infer instruction flags, or NULL if no flag values
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|
// have been inferred.
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|
Record *InferredFrom;
|
2010-11-01 12:03:32 +08:00
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CodeGenInstruction(Record *R);
|
2010-10-12 02:25:51 +08:00
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2010-03-28 04:09:24 +08:00
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/// HasOneImplicitDefWithKnownVT - If the instruction has at least one
|
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|
/// implicit def and it has a known VT, return the VT, otherwise return
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/// MVT::Other.
|
2010-10-09 02:09:59 +08:00
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MVT::SimpleValueType
|
2010-03-28 04:09:24 +08:00
|
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|
HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const;
|
2011-03-15 01:32:49 +08:00
|
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2010-11-01 09:07:14 +08:00
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/// FlattenAsmStringVariants - Flatten the specified AsmString to only
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/// include text from the specified variant, returning the new string.
|
|
|
|
static std::string FlattenAsmStringVariants(StringRef AsmString,
|
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|
|
unsigned Variant);
|
2017-11-18 08:16:44 +08:00
|
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// Is the specified operand in a generic instruction implicitly a pointer.
|
|
|
|
// This can be used on intructions that use typeN or ptypeN to identify
|
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|
// operands that should be considered as pointers even though SelectionDAG
|
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|
|
// didn't make a distinction between integer and pointers.
|
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|
|
bool isOperandAPointer(unsigned i) const;
|
2004-08-01 13:04:00 +08:00
|
|
|
};
|
2011-03-15 01:32:49 +08:00
|
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2010-11-01 12:05:41 +08:00
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/// CodeGenInstAlias - This represents an InstAlias definition.
|
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|
|
class CodeGenInstAlias {
|
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|
public:
|
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|
|
Record *TheDef; // The actual record defining this InstAlias.
|
2011-03-15 01:32:49 +08:00
|
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|
2010-11-01 12:05:41 +08:00
|
|
|
/// AsmString - The format string used to emit a .s file for the
|
|
|
|
/// instruction.
|
|
|
|
std::string AsmString;
|
2011-03-15 01:32:49 +08:00
|
|
|
|
2010-11-01 13:34:34 +08:00
|
|
|
/// Result - The result instruction.
|
2011-07-30 06:43:06 +08:00
|
|
|
DagInit *Result;
|
2011-03-15 01:32:49 +08:00
|
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|
|
2010-11-06 14:39:47 +08:00
|
|
|
/// ResultInst - The instruction generated by the alias (decoded from
|
|
|
|
/// Result).
|
|
|
|
CodeGenInstruction *ResultInst;
|
2011-03-15 01:32:49 +08:00
|
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|
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|
|
|
2010-11-06 14:39:47 +08:00
|
|
|
struct ResultOperand {
|
2010-11-07 03:25:43 +08:00
|
|
|
private:
|
2012-06-08 08:25:03 +08:00
|
|
|
std::string Name;
|
2010-11-06 14:39:47 +08:00
|
|
|
Record *R;
|
2011-03-15 01:32:49 +08:00
|
|
|
|
2010-11-07 03:25:43 +08:00
|
|
|
int64_t Imm;
|
2011-03-15 01:32:49 +08:00
|
|
|
public:
|
2010-11-07 03:25:43 +08:00
|
|
|
enum {
|
|
|
|
K_Record,
|
2010-11-07 03:57:21 +08:00
|
|
|
K_Imm,
|
|
|
|
K_Reg
|
2010-11-07 03:25:43 +08:00
|
|
|
} Kind;
|
2011-03-15 01:32:49 +08:00
|
|
|
|
2016-05-27 22:27:24 +08:00
|
|
|
ResultOperand(std::string N, Record *r)
|
|
|
|
: Name(std::move(N)), R(r), Kind(K_Record) {}
|
2010-11-07 03:25:43 +08:00
|
|
|
ResultOperand(int64_t I) : Imm(I), Kind(K_Imm) {}
|
2010-11-07 03:57:21 +08:00
|
|
|
ResultOperand(Record *r) : R(r), Kind(K_Reg) {}
|
2010-11-07 03:25:43 +08:00
|
|
|
|
|
|
|
bool isRecord() const { return Kind == K_Record; }
|
|
|
|
bool isImm() const { return Kind == K_Imm; }
|
2010-11-07 03:57:21 +08:00
|
|
|
bool isReg() const { return Kind == K_Reg; }
|
2011-03-15 01:32:49 +08:00
|
|
|
|
2010-11-07 03:25:43 +08:00
|
|
|
StringRef getName() const { assert(isRecord()); return Name; }
|
|
|
|
Record *getRecord() const { assert(isRecord()); return R; }
|
|
|
|
int64_t getImm() const { assert(isImm()); return Imm; }
|
2010-11-07 03:57:21 +08:00
|
|
|
Record *getRegister() const { assert(isReg()); return R; }
|
2014-05-15 21:36:01 +08:00
|
|
|
|
|
|
|
unsigned getMINumOperands() const;
|
2010-11-06 14:39:47 +08:00
|
|
|
};
|
2011-03-15 01:32:49 +08:00
|
|
|
|
2010-11-06 14:39:47 +08:00
|
|
|
/// ResultOperands - The decoded operands for the result instruction.
|
|
|
|
std::vector<ResultOperand> ResultOperands;
|
2011-01-21 02:38:02 +08:00
|
|
|
|
2011-01-27 03:44:55 +08:00
|
|
|
/// ResultInstOperandIndex - For each operand, this vector holds a pair of
|
|
|
|
/// indices to identify the corresponding operand in the result
|
|
|
|
/// instruction. The first index specifies the operand and the second
|
|
|
|
/// index specifies the suboperand. If there are no suboperands or if all
|
|
|
|
/// of them are matched by the operand, the second value should be -1.
|
|
|
|
std::vector<std::pair<unsigned, int> > ResultInstOperandIndex;
|
2011-03-15 01:32:49 +08:00
|
|
|
|
2014-05-15 19:16:32 +08:00
|
|
|
CodeGenInstAlias(Record *R, unsigned Variant, CodeGenTarget &T);
|
2011-01-27 03:44:55 +08:00
|
|
|
|
2011-07-30 06:43:06 +08:00
|
|
|
bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
|
Print out the location of expanded multiclass defs in TableGen errors.
When reporting an error for a defm, we would previously only report the
location of the outer defm, which is not always where the error is.
Now we also print the location of the expanded multiclass defs:
lib/Target/X86/X86InstrSSE.td:2902:12: error: foo
defm ADD : basic_sse12_fp_binop_s<0x58, "add", fadd, SSE_ALU_ITINS_S>,
^
lib/Target/X86/X86InstrSSE.td:2801:11: note: instantiated from multiclass
defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128,
^
lib/Target/X86/X86InstrSSE.td:194:5: note: instantiated from multiclass
def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
^
llvm-svn: 162409
2012-08-23 07:33:58 +08:00
|
|
|
Record *InstOpRec, bool hasSubOps, ArrayRef<SMLoc> Loc,
|
2011-01-27 03:44:55 +08:00
|
|
|
CodeGenTarget &T, ResultOperand &ResOp);
|
2011-03-15 01:32:49 +08:00
|
|
|
};
|
2010-11-01 12:05:41 +08:00
|
|
|
}
|
2004-08-01 13:04:00 +08:00
|
|
|
|
|
|
|
#endif
|