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llvm-project/polly/test/ScopDetect/non-affine-loop-condition-d...

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Do not detect Scops with only one loop. If a region does not have more than one loop, we do not identify it as a Scop in ScopDetection. The main optimizations Polly is currently performing (tiling, preparation for outer-loop vectorization and loop fusion) are unlikely to have a positive impact on individual loops. In some cases, Polly's run-time alias checks or conditional hoisting may still have a positive impact, but those are mostly enabling transformations which LLVM already performs for individual loops. As we do not focus on individual loops, we leave them untouched to not introduce compile time regressions and execution time noise. This results in good compile time reduction (oourafft: -73.99%, smg2000: -56.25%). Contributed-by: Pratik Bhatu <cs12b1010@iith.ac.in> Reviewers: grosser Differential Revision: http://reviews.llvm.org/D12268 llvm-svn: 246161
2015-08-28 00:55:18 +08:00
; RUN: opt %loadPolly -basicaa -polly-detect -polly-allow-nonaffine-branches \
; RUN: -polly-allow-nonaffine-loops=false -polly-detect-unprofitable \
; RUN: -analyze < %s | FileCheck %s --check-prefix=REJECTNONAFFINELOOPS
; RUN: opt %loadPolly -basicaa -polly-detect -polly-allow-nonaffine-branches \
; RUN: -polly-allow-nonaffine-loops=true -polly-detect-unprofitable \
; RUN: -analyze < %s | FileCheck %s --check-prefix=ALLOWNONAFFINELOOPS
; RUN: opt %loadPolly -basicaa -polly-detect -polly-allow-nonaffine \
; RUN: -polly-allow-nonaffine-branches -polly-allow-nonaffine-loops=true \
; RUN: -polly-detect-unprofitable -polly-detect-unprofitable -analyze < %s \
; RUN: | FileCheck %s --check-prefix=ALLOWNONAFFINELOOPSANDACCESSES
Allow loops in non-affine subregions -- SCoP Modeling This will allow the ScopInfo to build the polyhedral representation for non-affine regions that contain loops. Such loops are basically not visible in the SCoP representation. Accesses that are variant in such loops are therefor represented as non-affine accesses. Differential Revision: http://reviews.llvm.org/D8153 llvm-svn: 234713
2015-04-13 06:58:40 +08:00
;
; Here we have a non-affine loop (in the context of the loop nest)
; and also a non-affine access (A[k]). While we can always detect the
; innermost loop as a SCoP of depth 1, we have to reject the loop nest if not
; both, non-affine loops as well as non-affine accesses are allowed.
;
; REJECTNONAFFINELOOPS: Valid Region for Scop: bb15 => bb26
; REJECTNONAFFINELOOPS-NOT: Valid
; ALLOWNONAFFINELOOPS: Valid Region for Scop: bb15 => bb26
; ALLOWNONAFFINELOOPS-NOT: Valid
; ALLOWNONAFFINELOOPSANDACCESSES: Valid Region for Scop: bb11 => bb29
;
; void f(int *A) {
; for (int i = 0; i < 1024; i++)
; for (int j = 0; j < 1024; j++)
; for (int k = i *j; k < 1024; k++)
; A[k] += A[i] + A[j];
; }
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A) {
bb:
br label %bb11
bb11: ; preds = %bb28, %bb
%indvars.iv8 = phi i64 [ %indvars.iv.next9, %bb28 ], [ 0, %bb ]
%indvars.iv1 = phi i64 [ %indvars.iv.next2, %bb28 ], [ 0, %bb ]
%exitcond10 = icmp ne i64 %indvars.iv8, 1024
br i1 %exitcond10, label %bb12, label %bb29
bb12: ; preds = %bb11
br label %bb13
bb13: ; preds = %bb26, %bb12
%indvars.iv5 = phi i64 [ %indvars.iv.next6, %bb26 ], [ 0, %bb12 ]
%indvars.iv3 = phi i64 [ %indvars.iv.next4, %bb26 ], [ 0, %bb12 ]
%exitcond7 = icmp ne i64 %indvars.iv5, 1024
br i1 %exitcond7, label %bb14, label %bb27
bb14: ; preds = %bb13
br label %bb15
bb15: ; preds = %bb24, %bb14
%indvars.iv = phi i64 [ %indvars.iv.next, %bb24 ], [ %indvars.iv3, %bb14 ]
%exitcond = icmp ne i64 %indvars.iv, 1024
br i1 %exitcond, label %bb16, label %bb25
bb16: ; preds = %bb15
%tmp = getelementptr inbounds i32, i32* %A, i64 %indvars.iv8
%tmp17 = load i32, i32* %tmp, align 4
%tmp18 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv5
%tmp19 = load i32, i32* %tmp18, align 4
%tmp20 = add nsw i32 %tmp17, %tmp19
%tmp21 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
%tmp22 = load i32, i32* %tmp21, align 4
%tmp23 = add nsw i32 %tmp22, %tmp20
store i32 %tmp23, i32* %tmp21, align 4
br label %bb24
bb24: ; preds = %bb16
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
br label %bb15
bb25: ; preds = %bb15
br label %bb26
bb26: ; preds = %bb25
%indvars.iv.next6 = add nuw nsw i64 %indvars.iv5, 1
%indvars.iv.next4 = add nuw nsw i64 %indvars.iv3, %indvars.iv1
br label %bb13
bb27: ; preds = %bb13
br label %bb28
bb28: ; preds = %bb27
%indvars.iv.next9 = add nuw nsw i64 %indvars.iv8, 1
%indvars.iv.next2 = add nuw nsw i64 %indvars.iv1, 1
br label %bb11
bb29: ; preds = %bb11
ret void
}