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llvm-project/llvm/test/CodeGen/X86/fast-isel-load-i1.ll

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[X86] Use update_llc_test_checks.py to regenerate a test. llvm-svn: 298044
2017-03-17 13:59:57 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[X86][FastISel] Use a COPY from K register to a GPR instead of a K operation The KORTEST was introduced due to a bug where a TEST instruction used a K register. but, turns out that the opposite case of KORTEST using a GPR is now happening The change removes the KORTEST flow and adds a COPY instruction from the K reg to a GPR. Differential Revision: https://reviews.llvm.org/D24953 llvm-svn: 282580
2016-09-28 19:22:17 +08:00
; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s
define i1 @test_i1(i1* %b) {
; CHECK-LABEL: test_i1:
; CHECK: # BB#0: # %entry
[X86][AVX512] Make i1 illegal in the CodeGen This patch defines the i1 type as illegal in the X86 backend for AVX512. For DAG operations on <N x i1> types (build vector, extract vector element, ...) i8 is used, and should be truncated/extended. This should produce better scalar code for i1 types since GPRs will be used instead of mask registers. Differential Revision: https://reviews.llvm.org/D32273 llvm-svn: 303421
2017-05-19 20:35:15 +08:00
; CHECK-NEXT: testb $1, (%rdi)
[X86] Use update_llc_test_checks.py to regenerate a test. llvm-svn: 298044
2017-03-17 13:59:57 +08:00
; CHECK-NEXT: je .LBB0_2
; CHECK-NEXT: # BB#1: # %in
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_2: # %out
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: retq
[X86][FastISel] Use a COPY from K register to a GPR instead of a K operation The KORTEST was introduced due to a bug where a TEST instruction used a K register. but, turns out that the opposite case of KORTEST using a GPR is now happening The change removes the KORTEST flow and adds a COPY instruction from the K reg to a GPR. Differential Revision: https://reviews.llvm.org/D24953 llvm-svn: 282580
2016-09-28 19:22:17 +08:00
entry:
%0 = load i1, i1* %b, align 1
br i1 %0, label %in, label %out
in:
ret i1 0
out:
ret i1 1
}