forked from OSchip/llvm-project
81 lines
2.1 KiB
LLVM
81 lines
2.1 KiB
LLVM
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; Test the three-operand form of 64-bit addition.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i64 @foo(i64, i64, i64)
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; Check ALGRK.
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define i64 @f1(i64 %dummy, i64 %a, i64 %b, i64 *%flag) {
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; CHECK-LABEL: f1:
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; CHECK: algrk %r2, %r3, %r4
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; CHECK: ipm [[REG1:%r[0-5]]]
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; CHECK: risbg [[REG2:%r[0-5]]], [[REG1]], 63, 191, 35
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; CHECK: stg [[REG2]], 0(%r5)
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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%ext = zext i1 %obit to i64
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store i64 %ext, i64 *%flag
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ret i64 %val
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}
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; Check using the overflow result for a branch.
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define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f2:
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; CHECK: algrk %r2, %r3, %r4
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; CHECK-NEXT: bler %r14
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; CHECK: lghi %r2, 0
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; CHECK: jg foo@PLT
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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br i1 %obit, label %call, label %exit
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call:
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%res = tail call i64 @foo(i64 0, i64 %a, i64 %b)
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ret i64 %res
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exit:
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ret i64 %val
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}
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; ... and the same with the inverted direction.
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define i64 @f3(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f3:
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; CHECK: algrk %r2, %r3, %r4
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; CHECK-NEXT: bnler %r14
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; CHECK: lghi %r2, 0
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; CHECK: jg foo@PLT
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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br i1 %obit, label %exit, label %call
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call:
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%res = tail call i64 @foo(i64 0, i64 %a, i64 %b)
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ret i64 %res
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exit:
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ret i64 %val
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}
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; Check that we can still use ALGR in obvious cases.
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define i64 @f4(i64 %a, i64 %b, i64 *%flag) {
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; CHECK-LABEL: f4:
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; CHECK: algr %r2, %r3
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; CHECK: ipm [[REG1:%r[0-5]]]
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; CHECK: risbg [[REG2:%r[0-5]]], [[REG1]], 63, 191, 35
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; CHECK: stg [[REG2]], 0(%r4)
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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%ext = zext i1 %obit to i64
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store i64 %ext, i64 *%flag
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ret i64 %val
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}
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declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
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