2016-11-15 17:51:02 +08:00
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//===- SubtargetFeatureInfo.h - Helpers for subtarget features ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_UTIL_TABLEGEN_SUBTARGETFEATUREINFO_H
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#define LLVM_UTIL_TABLEGEN_SUBTARGETFEATUREINFO_H
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#include "llvm/TableGen/Error.h"
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#include "llvm/TableGen/Record.h"
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#include <map>
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Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
emission of instructions that don't satisfy their predicates. One deliberate
use is the SYNC instruction where the version with an operand is correctly
defined as requiring MIPS32 while the version without an operand is defined
as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
MCCodeEmitter infrastructure.
Patches for ARM and Mips will follow.
Depends on D25617
Reviewers: tstellarAMD, jmolloy
Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits
Differential Revision: https://reviews.llvm.org/D25618
llvm-svn: 287439
2016-11-19 21:05:44 +08:00
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#include <string>
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#include <vector>
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2016-11-15 17:51:02 +08:00
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namespace llvm {
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class Record;
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class RecordKeeper;
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/// Helper class for storing information on a subtarget feature which
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/// participates in instruction matching.
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struct SubtargetFeatureInfo {
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/// \brief The predicate record for this feature.
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Record *TheDef;
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/// \brief An unique index assigned to represent this feature.
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uint64_t Index;
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SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {}
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/// \brief The name of the enumerated constant identifying this feature.
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std::string getEnumName() const { return "Feature_" + TheDef->getName(); }
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void dump() const;
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static std::vector<std::pair<Record *, SubtargetFeatureInfo>>
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getAll(const RecordKeeper &Records);
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Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
emission of instructions that don't satisfy their predicates. One deliberate
use is the SYNC instruction where the version with an operand is correctly
defined as requiring MIPS32 while the version without an operand is defined
as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
MCCodeEmitter infrastructure.
Patches for ARM and Mips will follow.
Depends on D25617
Reviewers: tstellarAMD, jmolloy
Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits
Differential Revision: https://reviews.llvm.org/D25618
llvm-svn: 287439
2016-11-19 21:05:44 +08:00
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/// Emit the subtarget feature flag definitions.
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static void emitSubtargetFeatureFlagEnumeration(
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std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
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&SubtargetFeatures,
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raw_ostream &OS);
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static void emitNameTable(std::map<Record *, SubtargetFeatureInfo,
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LessRecordByID> &SubtargetFeatures,
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raw_ostream &OS);
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2016-11-15 17:51:02 +08:00
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/// Emit the function to compute the list of available features given a
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/// subtarget.
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///
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/// \param TargetName The name of the target as used in class prefixes (e.g.
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/// <TargetName>Subtarget)
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/// \param ClassName The name of the class (without the <Target> prefix)
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/// that will contain the generated functions.
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Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
emission of instructions that don't satisfy their predicates. One deliberate
use is the SYNC instruction where the version with an operand is correctly
defined as requiring MIPS32 while the version without an operand is defined
as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
MCCodeEmitter infrastructure.
Patches for ARM and Mips will follow.
Depends on D25617
Reviewers: tstellarAMD, jmolloy
Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits
Differential Revision: https://reviews.llvm.org/D25618
llvm-svn: 287439
2016-11-19 21:05:44 +08:00
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/// \param FuncName The name of the function to emit.
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2016-11-15 17:51:02 +08:00
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/// \param SubtargetFeatures A map of TableGen records to the
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/// SubtargetFeatureInfo equivalent.
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static void emitComputeAvailableFeatures(
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Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
emission of instructions that don't satisfy their predicates. One deliberate
use is the SYNC instruction where the version with an operand is correctly
defined as requiring MIPS32 while the version without an operand is defined
as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
MCCodeEmitter infrastructure.
Patches for ARM and Mips will follow.
Depends on D25617
Reviewers: tstellarAMD, jmolloy
Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits
Differential Revision: https://reviews.llvm.org/D25618
llvm-svn: 287439
2016-11-19 21:05:44 +08:00
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StringRef TargetName, StringRef ClassName, StringRef FuncName,
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2016-11-15 17:51:02 +08:00
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std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
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&SubtargetFeatures,
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raw_ostream &OS);
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};
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} // end namespace llvm
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#endif // LLVM_UTIL_TABLEGEN_SUBTARGETFEATUREINFO_H
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