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llvm-project/llvm/test/CodeGen/Thumb2/thumb2-sub3.ll

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Enabling thumb2 mode used to force support for armv6t2. Replace this with a temporary assertion and adjust the various test cases. llvm-svn: 197224
2013-12-13 19:16:00 +08:00
; RUN: llc -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 < %s | FileCheck %s
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
; 171 = 0x000000ab
define i64 @f1(i64 %a) {
; CHECK: f1
; CHECK: subs r0, #171
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
2011-04-23 11:55:32 +08:00
; CHECK: sbc r1, r1, #0
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
%tmp = sub i64 %a, 171
ret i64 %tmp
}
; 1179666 = 0x00120012
define i64 @f2(i64 %a) {
; CHECK: f2
; CHECK: subs.w r0, r0, #1179666
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
2011-04-23 11:55:32 +08:00
; CHECK: sbc r1, r1, #0
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
%tmp = sub i64 %a, 1179666
ret i64 %tmp
}
; 872428544 = 0x34003400
define i64 @f3(i64 %a) {
; CHECK: f3
; CHECK: subs.w r0, r0, #872428544
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
2011-04-23 11:55:32 +08:00
; CHECK: sbc r1, r1, #0
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
%tmp = sub i64 %a, 872428544
ret i64 %tmp
}
; 1448498774 = 0x56565656
define i64 @f4(i64 %a) {
; CHECK: f4
; CHECK: subs.w r0, r0, #1448498774
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
2011-04-23 11:55:32 +08:00
; CHECK: sbc r1, r1, #0
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
%tmp = sub i64 %a, 1448498774
ret i64 %tmp
}
; 66846720 = 0x03fc0000
define i64 @f5(i64 %a) {
; CHECK: f5
; CHECK: subs.w r0, r0, #66846720
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
2011-04-23 11:55:32 +08:00
; CHECK: sbc r1, r1, #0
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
%tmp = sub i64 %a, 66846720
ret i64 %tmp
}
; 734439407618 = 0x000000ab00000002
define i64 @f6(i64 %a) {
; CHECK: f6
; CHECK: subs r0, #2
; CHECK: sbc r1, r1, #171
%tmp = sub i64 %a, 734439407618
ret i64 %tmp
}