2014-11-07 22:24:31 +08:00
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//===---- MipsCCState.cpp - CCState with Mips specific extensions ---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsCCState.h"
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#include "MipsSubtarget.h"
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#include "llvm/IR/Module.h"
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using namespace llvm;
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/// This function returns true if CallSym is a long double emulation routine.
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static bool isF128SoftLibCall(const char *CallSym) {
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const char *const LibCalls[] = {
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"__addtf3", "__divtf3", "__eqtf2", "__extenddftf2",
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"__extendsftf2", "__fixtfdi", "__fixtfsi", "__fixtfti",
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"__fixunstfdi", "__fixunstfsi", "__fixunstfti", "__floatditf",
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"__floatsitf", "__floattitf", "__floatunditf", "__floatunsitf",
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"__floatuntitf", "__getf2", "__gttf2", "__letf2",
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"__lttf2", "__multf3", "__netf2", "__powitf2",
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"__subtf3", "__trunctfdf2", "__trunctfsf2", "__unordtf2",
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"ceill", "copysignl", "cosl", "exp2l",
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"expl", "floorl", "fmal", "fmodl",
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"log10l", "log2l", "logl", "nearbyintl",
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2016-03-14 20:50:23 +08:00
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"powl", "rintl", "roundl", "sinl",
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"sqrtl", "truncl"};
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2014-11-07 22:24:31 +08:00
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// Check that LibCalls is sorted alphabetically.
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2015-10-18 05:32:26 +08:00
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auto Comp = [](const char *S1, const char *S2) { return strcmp(S1, S2) < 0; };
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assert(std::is_sorted(std::begin(LibCalls), std::end(LibCalls), Comp));
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return std::binary_search(std::begin(LibCalls), std::end(LibCalls),
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CallSym, Comp);
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2014-11-07 22:24:31 +08:00
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}
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/// This function returns true if Ty is fp128, {f128} or i128 which was
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/// originally a fp128.
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2017-04-26 19:10:38 +08:00
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static bool originalTypeIsF128(const Type *Ty, const char *Func) {
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2014-11-07 22:24:31 +08:00
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if (Ty->isFP128Ty())
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return true;
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if (Ty->isStructTy() && Ty->getStructNumElements() == 1 &&
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Ty->getStructElementType(0)->isFP128Ty())
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return true;
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// If the Ty is i128 and the function being called is a long double emulation
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// routine, then the original type is f128.
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2017-04-26 19:10:38 +08:00
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return (Func && Ty->isIntegerTy(128) && isF128SoftLibCall(Func));
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2014-11-07 22:24:31 +08:00
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}
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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/// Return true if the original type was vXfXX.
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static bool originalEVTTypeIsVectorFloat(EVT Ty) {
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if (Ty.isVector() && Ty.getVectorElementType().isFloatingPoint())
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return true;
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return false;
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}
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/// Return true if the original type was vXfXX / vXfXX.
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static bool originalTypeIsVectorFloat(const Type * Ty) {
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if (Ty->isVectorTy() && Ty->isFPOrFPVectorTy())
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return true;
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return false;
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}
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2014-11-07 22:24:31 +08:00
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MipsCCState::SpecialCallingConvType
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MipsCCState::getSpecialCallingConvForCallee(const SDNode *Callee,
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const MipsSubtarget &Subtarget) {
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MipsCCState::SpecialCallingConvType SpecialCallingConv = NoSpecialCallingConv;
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if (Subtarget.inMips16HardFloat()) {
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if (const GlobalAddressSDNode *G =
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dyn_cast<const GlobalAddressSDNode>(Callee)) {
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llvm::StringRef Sym = G->getGlobal()->getName();
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Function *F = G->getGlobal()->getParent()->getFunction(Sym);
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if (F && F->hasFnAttribute("__Mips16RetHelper")) {
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SpecialCallingConv = Mips16RetHelperConv;
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}
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}
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}
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return SpecialCallingConv;
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}
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void MipsCCState::PreAnalyzeCallResultForF128(
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const SmallVectorImpl<ISD::InputArg> &Ins,
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2017-04-26 19:10:38 +08:00
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const Type *RetTy, const char *Call) {
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2014-11-08 00:54:21 +08:00
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for (unsigned i = 0; i < Ins.size(); ++i) {
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2014-11-07 22:24:31 +08:00
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OriginalArgWasF128.push_back(
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2017-04-26 19:10:38 +08:00
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originalTypeIsF128(RetTy, Call));
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OriginalArgWasFloat.push_back(RetTy->isFloatingPointTy());
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2014-11-08 00:54:21 +08:00
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}
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2014-11-07 22:24:31 +08:00
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}
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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/// Identify lowered values that originated from f128 or float arguments and
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/// record this for use by RetCC_MipsN.
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2014-11-07 22:24:31 +08:00
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void MipsCCState::PreAnalyzeReturnForF128(
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const SmallVectorImpl<ISD::OutputArg> &Outs) {
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const MachineFunction &MF = getMachineFunction();
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2014-11-08 00:54:21 +08:00
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for (unsigned i = 0; i < Outs.size(); ++i) {
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2014-11-07 22:24:31 +08:00
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OriginalArgWasF128.push_back(
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originalTypeIsF128(MF.getFunction()->getReturnType(), nullptr));
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2014-11-08 00:54:21 +08:00
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OriginalArgWasFloat.push_back(
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MF.getFunction()->getReturnType()->isFloatingPointTy());
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}
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2014-11-07 22:24:31 +08:00
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}
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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/// Identify lower values that originated from vXfXX and record
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2014-11-07 22:24:31 +08:00
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/// this.
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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void MipsCCState::PreAnalyzeCallResultForVectorFloat(
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const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) {
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for (unsigned i = 0; i < Ins.size(); ++i) {
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OriginalRetWasFloatVector.push_back(originalTypeIsVectorFloat(RetTy));
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}
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}
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/// Identify lowered values that originated from vXfXX arguments and record
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/// this.
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void MipsCCState::PreAnalyzeReturnForVectorFloat(
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const SmallVectorImpl<ISD::OutputArg> &Outs) {
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for (unsigned i = 0; i < Outs.size(); ++i) {
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ISD::OutputArg Out = Outs[i];
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OriginalRetWasFloatVector.push_back(
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originalEVTTypeIsVectorFloat(Out.ArgVT));
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}
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}
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/// Identify lowered values that originated from f128, float and sret to vXfXX
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/// arguments and record this.
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2014-11-07 22:24:31 +08:00
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void MipsCCState::PreAnalyzeCallOperands(
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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std::vector<TargetLowering::ArgListEntry> &FuncArgs,
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2017-04-26 19:10:38 +08:00
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const char *Func) {
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2014-11-07 22:24:31 +08:00
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for (unsigned i = 0; i < Outs.size(); ++i) {
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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TargetLowering::ArgListEntry FuncArg = FuncArgs[Outs[i].OrigArgIndex];
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OriginalArgWasF128.push_back(originalTypeIsF128(FuncArg.Ty, Func));
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OriginalArgWasFloat.push_back(FuncArg.Ty->isFloatingPointTy());
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OriginalArgWasFloatVector.push_back(FuncArg.Ty->isVectorTy());
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2014-11-07 22:24:31 +08:00
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CallOperandIsFixed.push_back(Outs[i].IsFixed);
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}
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}
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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/// Identify lowered values that originated from f128, float and vXfXX arguments
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/// and record this.
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2014-11-07 22:24:31 +08:00
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void MipsCCState::PreAnalyzeFormalArgumentsForF128(
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const SmallVectorImpl<ISD::InputArg> &Ins) {
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const MachineFunction &MF = getMachineFunction();
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for (unsigned i = 0; i < Ins.size(); ++i) {
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Function::const_arg_iterator FuncArg = MF.getFunction()->arg_begin();
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// SRet arguments cannot originate from f128 or {f128} returns so we just
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// push false. We have to handle this specially since SRet arguments
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// aren't mapped to an original argument.
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if (Ins[i].Flags.isSRet()) {
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OriginalArgWasF128.push_back(false);
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2014-11-10 23:57:53 +08:00
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OriginalArgWasFloat.push_back(false);
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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OriginalArgWasFloatVector.push_back(false);
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2014-11-07 22:24:31 +08:00
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continue;
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}
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2015-02-17 02:10:47 +08:00
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assert(Ins[i].getOrigArgIndex() < MF.getFunction()->arg_size());
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std::advance(FuncArg, Ins[i].getOrigArgIndex());
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2014-11-07 22:24:31 +08:00
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OriginalArgWasF128.push_back(
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originalTypeIsF128(FuncArg->getType(), nullptr));
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2014-11-08 00:54:21 +08:00
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OriginalArgWasFloat.push_back(FuncArg->getType()->isFloatingPointTy());
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown,
backends can request that LLVM to scalarize vector types for calls
and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in
integer registers. With SelectionDAG's new hooks, the MIPS backend can now
handle LLVM-IR with vector types in calls and returns. E.g.
'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for
calls and returns if vector types were not legal. If vector types were legal,
a single 128bit vector argument would be assigned to a single 32 bit / 64 bit
integer register.
By teaching the MIPS backend to inspect the original types, it can now
implement the MIPS vector ABI which requires a particular method of
scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call
@foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3,
i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on
uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
2017-06-09 22:37:08 +08:00
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// The MIPS vector ABI exhibits a corner case of sorts or quirk; if the
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// first argument is actually an SRet pointer to a vector, then the next
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// argument slot is $a2.
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OriginalArgWasFloatVector.push_back(FuncArg->getType()->isVectorTy());
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2014-11-07 22:24:31 +08:00
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}
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|
|
|
}
|