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llvm-project/llvm/test/CodeGen/SystemZ/fp-const-11.ll

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[SystemZ] Add support for IBM z14 processor (3/3) This adds support for the new 128-bit vector float instructions of z14. Note that these instructions actually only operate on the f128 type, since only each 128-bit vector register can hold only one 128-bit float value. However, this is still preferable to the legacy 128-bit float instructions, since those operate on pairs of floating-point registers (so we can hold at most 8 values in registers), while the new instructions use single vector registers (so we hold up to 32 value in registers). Adding support includes: - Enabling the instructions for the assembler/disassembler. - CodeGen for the instructions. This includes allocating the f128 type now to the VR128BitRegClass instead of FP128BitRegClass. - Scheduler description support for the instructions. Note that for a small number of operations, we have no new vector instructions (like integer <-> 128-bit float conversions), and so we use the legacy instruction and then reformat the operand (i.e. copy between a pair of floating-point registers and a vector register). llvm-svn: 308196
2017-07-18 01:44:20 +08:00
; Test loads of f128 floating-point constants on z14.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s -check-prefix=CONST
; Test loading zero.
define void @f1(fp128 *%x) {
; CHECK-LABEL: f1:
; CHECK: vzero [[REG:%v[0-9]+]]
; CHECK: vst [[REG]], 0(%r2)
; CHECK: br %r14
store fp128 0xL00000000000000000000000000000000, fp128 *%x
ret void
}
; Test loading of negative floating-point zero.
define void @f2(fp128 *%x) {
; CHECK-LABEL: f2:
; CHECK: vzero [[REG:%v[0-9]+]]
; CHECK: wflnxb [[REG]], [[REG]]
; CHECK: vst [[REG]], 0(%r2)
; CHECK: br %r14
store fp128 0xL00000000000000008000000000000000, fp128 *%x
ret void
}
; Test loading of a 128-bit floating-point constant. This value would
; actually fit within the 32-bit format, but we don't have extending
; loads into vector registers.
define void @f3(fp128 *%x) {
; CHECK-LABEL: f3:
; CHECK: larl [[REGISTER:%r[1-5]+]], {{.*}}
; CHECK: vl [[REG:%v[0-9]+]], 0([[REGISTER]])
; CHECK: vst [[REG]], 0(%r2)
; CHECK: br %r14
; CONST: .quad 4611404543484231680
; CONST: .quad 0
store fp128 0xL00000000000000003fff000002000000, fp128 *%x
ret void
}