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llvm-project/llvm/test/Transforms/SCCP/switch.ll

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[SCCP] Add switch+range tests (NFC)
2020-07-22 05:07:22 +08:00
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -ipsccp < %s | FileCheck %s
Revert "Temporarily Revert "Add basic loop fusion pass."" The reversion apparently deleted the test/Transforms directory. Will be re-reverting again. llvm-svn: 358552
2019-04-17 12:52:47 +08:00
; Make sure we always consider the default edge executable for a switch
; with no cases.
declare void @foo()
define void @test1() {
[SCCP] Add switch+range tests (NFC)
2020-07-22 05:07:22 +08:00
; CHECK-LABEL: @test1(
; CHECK-NEXT: switch i32 undef, label [[D:%.*]] [
; CHECK-NEXT: ]
; CHECK: d:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: ret void
;
Revert "Temporarily Revert "Add basic loop fusion pass."" The reversion apparently deleted the test/Transforms directory. Will be re-reverting again. llvm-svn: 358552
2019-04-17 12:52:47 +08:00
switch i32 undef, label %d []
d:
call void @foo()
ret void
}
[SCCP] Add switch+range tests (NFC)
2020-07-22 05:07:22 +08:00
[SCCP] Add multi-edge switch + phi test case (NFC)
2020-07-23 02:18:13 +08:00
define i32 @test_duplicate_successors_phi(i1 %c, i32 %x) {
; CHECK-LABEL: @test_duplicate_successors_phi(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[SWITCH:%.*]], label [[END:%.*]]
; CHECK: switch:
Revert D84264 "[SCCP] Directly remove non-feasible edges" & 5db5b4bc4394ca247c9eb665e03b851848aa2fbf It breaks stage-2 build. Clang crashed when compiling llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp llvm/Support/GenericDomTree.h eraseNode: Node is not a leaf node
2020-07-24 08:51:48 +08:00
; CHECK-NEXT: switch i32 -1, label [[SWITCH_DEFAULT:%.*]] [
; CHECK-NEXT: i32 0, label [[END]]
; CHECK-NEXT: i32 1, label [[END]]
; CHECK-NEXT: ]
[SCCP] Add multi-edge switch + phi test case (NFC)
2020-07-23 02:18:13 +08:00
; CHECK: switch.default:
; CHECK-NEXT: ret i32 -1
; CHECK: end:
Revert D84264 "[SCCP] Directly remove non-feasible edges" & 5db5b4bc4394ca247c9eb665e03b851848aa2fbf It breaks stage-2 build. Clang crashed when compiling llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp llvm/Support/GenericDomTree.h eraseNode: Node is not a leaf node
2020-07-24 08:51:48 +08:00
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X:%.*]], [[ENTRY:%.*]] ], [ 1, [[SWITCH]] ], [ 1, [[SWITCH]] ]
; CHECK-NEXT: ret i32 [[PHI]]
[SCCP] Add multi-edge switch + phi test case (NFC)
2020-07-23 02:18:13 +08:00
;
entry:
br i1 %c, label %switch, label %end
switch:
switch i32 -1, label %switch.default [
i32 0, label %end
i32 1, label %end
]
switch.default:
ret i32 -1
end:
%phi = phi i32 [ %x, %entry ], [ 1, %switch ], [ 1, %switch ]
ret i32 %phi
}
[SCCP] Add additional multi-edge + phi tests (NFC)
2020-07-23 03:56:47 +08:00
define i32 @test_duplicate_successors_phi_2(i1 %c, i32 %x) {
; CHECK-LABEL: @test_duplicate_successors_phi_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[SWITCH:%.*]], label [[END:%.*]]
; CHECK: switch:
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X:%.*]], [[ENTRY:%.*]] ], [ 1, [[SWITCH]] ]
; CHECK-NEXT: ret i32 [[PHI]]
;
entry:
br i1 %c, label %switch, label %end
switch:
switch i32 0, label %switch.default [
i32 0, label %end
i32 1, label %end
]
switch.default:
ret i32 -1
end:
%phi = phi i32 [ %x, %entry ], [ 1, %switch ], [ 1, %switch ]
ret i32 %phi
}
[SCCP] Add another switch+phi test (NFC)
2020-07-24 03:50:47 +08:00
define i32 @test_duplicate_successors_phi_3(i1 %c1, i32 %x) {
; CHECK-LABEL: @test_duplicate_successors_phi_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[SWITCH:%.*]], label [[SWITCH_1:%.*]]
; CHECK: switch:
; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[X:%.*]], 3
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
; CHECK-NEXT: switch i32 [[X]], label [[SWITCH_DEFAULT:%.*]] [
; CHECK-NEXT: i32 0, label [[SWITCH_DEFAULT]]
; CHECK-NEXT: i32 1, label [[SWITCH_0:%.*]]
; CHECK-NEXT: i32 2, label [[SWITCH_0]]
; CHECK-NEXT: i32 3, label [[SWITCH_1]]
; CHECK-NEXT: i32 4, label [[SWITCH_1]]
; CHECK-NEXT: ]
; CHECK: switch.default:
; CHECK-NEXT: ret i32 -1
; CHECK: switch.0:
; CHECK-NEXT: ret i32 0
; CHECK: switch.1:
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], [[ENTRY:%.*]] ], [ 0, [[SWITCH]] ], [ 0, [[SWITCH]] ]
; CHECK-NEXT: ret i32 [[PHI]]
;
entry:
br i1 %c1, label %switch, label %switch.1
switch:
%c2 = icmp ult i32 %x, 3
call void @llvm.assume(i1 %c2)
switch i32 %x, label %switch.default [
i32 0, label %switch.default
i32 1, label %switch.0
i32 2, label %switch.0
i32 3, label %switch.1
i32 4, label %switch.1
]
switch.default:
ret i32 -1
switch.0:
ret i32 0
switch.1:
%phi = phi i32 [ %x, %entry ], [ 0, %switch ], [ 0, %switch ]
ret i32 %phi
}
[SCCP] Add switch+range tests (NFC)
2020-07-22 05:07:22 +08:00
define i32 @test_local_range(i32 %x) {
; CHECK-LABEL: @test_local_range(
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], 3
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: switch i32 [[X]], label [[SWITCH_DEFAULT:%.*]] [
; CHECK-NEXT: i32 0, label [[SWITCH_0:%.*]]
; CHECK-NEXT: i32 1, label [[SWITCH_1:%.*]]
; CHECK-NEXT: i32 2, label [[SWITCH_2:%.*]]
; CHECK-NEXT: i32 3, label [[SWITCH_3:%.*]]
; CHECK-NEXT: ]
; CHECK: switch.default:
; CHECK-NEXT: ret i32 -1
; CHECK: switch.0:
; CHECK-NEXT: ret i32 0
; CHECK: switch.1:
; CHECK-NEXT: ret i32 1
; CHECK: switch.2:
; CHECK-NEXT: ret i32 2
; CHECK: switch.3:
; CHECK-NEXT: ret i32 3
;
%c = icmp ult i32 %x, 3
call void @llvm.assume(i1 %c)
switch i32 %x, label %switch.default [
i32 0, label %switch.0
i32 1, label %switch.1
i32 2, label %switch.2
i32 3, label %switch.3
]
switch.default:
ret i32 -1
switch.0:
ret i32 0
switch.1:
ret i32 1
switch.2:
ret i32 2
switch.3:
ret i32 3
}
define i32 @test_duplicate_successors(i32 %x) {
; CHECK-LABEL: @test_duplicate_successors(
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], 3
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: switch i32 [[X]], label [[SWITCH_DEFAULT:%.*]] [
; CHECK-NEXT: i32 0, label [[SWITCH_0:%.*]]
; CHECK-NEXT: i32 1, label [[SWITCH_0]]
; CHECK-NEXT: i32 2, label [[SWITCH_1:%.*]]
; CHECK-NEXT: i32 3, label [[SWITCH_1]]
; CHECK-NEXT: i32 4, label [[SWITCH_2:%.*]]
; CHECK-NEXT: i32 5, label [[SWITCH_2]]
; CHECK-NEXT: ]
; CHECK: switch.default:
; CHECK-NEXT: ret i32 -1
; CHECK: switch.0:
; CHECK-NEXT: ret i32 0
; CHECK: switch.1:
; CHECK-NEXT: ret i32 1
; CHECK: switch.2:
; CHECK-NEXT: ret i32 2
;
%c = icmp ult i32 %x, 3
call void @llvm.assume(i1 %c)
switch i32 %x, label %switch.default [
i32 0, label %switch.0
i32 1, label %switch.0
i32 2, label %switch.1
i32 3, label %switch.1
i32 4, label %switch.2
i32 5, label %switch.2
]
switch.default:
ret i32 -1
switch.0:
ret i32 0
switch.1:
ret i32 1
switch.2:
ret i32 2
}
define internal i32 @test_ip_range(i32 %x) {
; CHECK-LABEL: @test_ip_range(
; CHECK-NEXT: switch i32 [[X:%.*]], label [[SWITCH_DEFAULT:%.*]] [
; CHECK-NEXT: i32 0, label [[SWITCH_0:%.*]]
; CHECK-NEXT: i32 1, label [[SWITCH_1:%.*]]
; CHECK-NEXT: i32 2, label [[SWITCH_2:%.*]]
; CHECK-NEXT: i32 3, label [[SWITCH_3:%.*]]
; CHECK-NEXT: ]
; CHECK: switch.default:
; CHECK-NEXT: ret i32 -1
; CHECK: switch.0:
; CHECK-NEXT: ret i32 0
; CHECK: switch.1:
; CHECK-NEXT: ret i32 1
; CHECK: switch.2:
; CHECK-NEXT: ret i32 2
; CHECK: switch.3:
; CHECK-NEXT: ret i32 3
;
switch i32 %x, label %switch.default [
i32 0, label %switch.0
i32 1, label %switch.1
i32 2, label %switch.2
i32 3, label %switch.3
]
switch.default:
ret i32 -1
switch.0:
ret i32 0
switch.1:
ret i32 1
switch.2:
ret i32 2
switch.3:
ret i32 3
}
define void @call_test_ip_range() {
; CHECK-LABEL: @call_test_ip_range(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test_ip_range(i32 1)
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @test_ip_range(i32 3)
; CHECK-NEXT: ret void
;
call i32 @test_ip_range(i32 1)
call i32 @test_ip_range(i32 3)
ret void
}
declare void @llvm.assume(i1)