forked from OSchip/llvm-project
37 lines
1.2 KiB
LLVM
37 lines
1.2 KiB
LLVM
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; Test that the dag combiner can understand that some vector operands are
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; all-zeros and then optimize the logical operations.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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define void @f1() {
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; CHECK-LABEL: f1:
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; CHECK: vno
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; CHECK-NOT: vno
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bb:
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%tmp = shufflevector <2 x i64> undef, <2 x i64> undef, <2 x i32> zeroinitializer
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br label %bb1
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bb1: ; preds = %bb
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%tmp2 = load i64, i64* undef, align 8
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%tmp3 = insertelement <2 x i64> undef, i64 %tmp2, i32 1
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%tmp4 = icmp ne <2 x i64> undef, zeroinitializer
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%tmp5 = xor <2 x i1> %tmp4, zeroinitializer
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%tmp6 = xor <2 x i1> zeroinitializer, %tmp5
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%tmp7 = and <2 x i64> %tmp3, %tmp
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%tmp8 = icmp ne <2 x i64> %tmp7, zeroinitializer
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%tmp9 = xor <2 x i1> zeroinitializer, %tmp8
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%tmp10 = icmp ne <2 x i64> undef, zeroinitializer
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%tmp11 = xor <2 x i1> %tmp10, %tmp9
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%tmp12 = and <2 x i1> %tmp6, %tmp11
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%tmp13 = extractelement <2 x i1> %tmp12, i32 0
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br i1 %tmp13, label %bb14, label %bb15
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bb14: ; preds = %bb1
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store i64 undef, i64* undef, align 8
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br label %bb15
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bb15: ; preds = %bb14, %bb1
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unreachable
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}
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