forked from OSchip/llvm-project
443 lines
19 KiB
LLVM
443 lines
19 KiB
LLVM
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; Test f64 and v2f64 strict comparisons.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test oeq.
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define <2 x i64> @f1(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f1:
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; CHECK: vfcedb %v24, %v26, %v28
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"oeq",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test one.
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define <2 x i64> @f2(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f2:
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; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
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; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v26, %v28
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; CHECK: vo %v24, [[REG1]], [[REG2]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"one",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test ogt.
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define <2 x i64> @f3(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f3:
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; CHECK: vfchdb %v24, %v26, %v28
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ogt",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test oge.
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define <2 x i64> @f4(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f4:
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; CHECK: vfchedb %v24, %v26, %v28
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"oge",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test ole.
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define <2 x i64> @f5(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f5:
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; CHECK: vfchedb %v24, %v28, %v26
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ole",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test olt.
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define <2 x i64> @f6(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f6:
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; CHECK: vfchdb %v24, %v28, %v26
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test ueq.
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define <2 x i64> @f7(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f7:
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; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
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; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v26, %v28
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; CHECK: vno %v24, [[REG1]], [[REG2]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ueq",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test une.
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define <2 x i64> @f8(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f8:
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; CHECK: vfcedb [[REG:%v[0-9]+]], %v26, %v28
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; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"une",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test ugt.
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define <2 x i64> @f9(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
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; CHECK-LABEL: f9:
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; CHECK: vfchedb [[REG:%v[0-9]+]], %v28, %v26
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; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ugt",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test uge.
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define <2 x i64> @f10(<2 x i64> %dummy, <2 x double> %val1,
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<2 x double> %val2) #0 {
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; CHECK-LABEL: f10:
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; CHECK: vfchdb [[REG:%v[0-9]+]], %v28, %v26
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; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"uge",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test ule.
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define <2 x i64> @f11(<2 x i64> %dummy, <2 x double> %val1,
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<2 x double> %val2) #0 {
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; CHECK-LABEL: f11:
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; CHECK: vfchdb [[REG:%v[0-9]+]], %v26, %v28
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; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ule",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test ult.
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define <2 x i64> @f12(<2 x i64> %dummy, <2 x double> %val1,
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<2 x double> %val2) #0 {
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; CHECK-LABEL: f12:
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; CHECK: vfchedb [[REG:%v[0-9]+]], %v26, %v28
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; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ult",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test ord.
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define <2 x i64> @f13(<2 x i64> %dummy, <2 x double> %val1,
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<2 x double> %val2) #0 {
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; CHECK-LABEL: f13:
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; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
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; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v26, %v28
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; CHECK: vo %v24, [[REG1]], [[REG2]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ord",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test uno.
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define <2 x i64> @f14(<2 x i64> %dummy, <2 x double> %val1,
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<2 x double> %val2) #0 {
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; CHECK-LABEL: f14:
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; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
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; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v26, %v28
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; CHECK: vno %v24, [[REG1]], [[REG2]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"uno",
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metadata !"fpexcept.strict") #0
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%ret = sext <2 x i1> %cmp to <2 x i64>
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ret <2 x i64> %ret
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}
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; Test oeq selects.
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define <2 x double> @f15(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f15:
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; CHECK: vfcedb [[REG:%v[0-9]+]], %v24, %v26
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; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"oeq",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test one selects.
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define <2 x double> @f16(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f16:
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; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
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; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v24, %v26
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; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
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; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"one",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test ogt selects.
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define <2 x double> @f17(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f17:
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; CHECK: vfchdb [[REG:%v[0-9]+]], %v24, %v26
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; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ogt",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test oge selects.
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define <2 x double> @f18(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f18:
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; CHECK: vfchedb [[REG:%v[0-9]+]], %v24, %v26
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; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"oge",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test ole selects.
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define <2 x double> @f19(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f19:
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; CHECK: vfchedb [[REG:%v[0-9]+]], %v26, %v24
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; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ole",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test olt selects.
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define <2 x double> @f20(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f20:
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; CHECK: vfchdb [[REG:%v[0-9]+]], %v26, %v24
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; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test ueq selects.
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define <2 x double> @f21(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f21:
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; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
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; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v24, %v26
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; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
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; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"ueq",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test une selects.
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define <2 x double> @f22(<2 x double> %val1, <2 x double> %val2,
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<2 x double> %val3, <2 x double> %val4) #0 {
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; CHECK-LABEL: f22:
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; CHECK: vfcedb [[REG:%v[0-9]+]], %v24, %v26
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; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
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; CHECK-NEXT: br %r14
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%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
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<2 x double> %val1, <2 x double> %val2,
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metadata !"une",
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metadata !"fpexcept.strict") #0
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%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
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ret <2 x double> %ret
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}
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; Test ugt selects.
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define <2 x double> @f23(<2 x double> %val1, <2 x double> %val2,
|
||
|
<2 x double> %val3, <2 x double> %val4) #0 {
|
||
|
; CHECK-LABEL: f23:
|
||
|
; CHECK: vfchedb [[REG:%v[0-9]+]], %v26, %v24
|
||
|
; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
|
||
|
<2 x double> %val1, <2 x double> %val2,
|
||
|
metadata !"ugt",
|
||
|
metadata !"fpexcept.strict") #0
|
||
|
%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
|
||
|
ret <2 x double> %ret
|
||
|
}
|
||
|
|
||
|
; Test uge selects.
|
||
|
define <2 x double> @f24(<2 x double> %val1, <2 x double> %val2,
|
||
|
<2 x double> %val3, <2 x double> %val4) #0 {
|
||
|
; CHECK-LABEL: f24:
|
||
|
; CHECK: vfchdb [[REG:%v[0-9]+]], %v26, %v24
|
||
|
; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
|
||
|
<2 x double> %val1, <2 x double> %val2,
|
||
|
metadata !"uge",
|
||
|
metadata !"fpexcept.strict") #0
|
||
|
%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
|
||
|
ret <2 x double> %ret
|
||
|
}
|
||
|
|
||
|
; Test ule selects.
|
||
|
define <2 x double> @f25(<2 x double> %val1, <2 x double> %val2,
|
||
|
<2 x double> %val3, <2 x double> %val4) #0 {
|
||
|
; CHECK-LABEL: f25:
|
||
|
; CHECK: vfchdb [[REG:%v[0-9]+]], %v24, %v26
|
||
|
; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
|
||
|
<2 x double> %val1, <2 x double> %val2,
|
||
|
metadata !"ule",
|
||
|
metadata !"fpexcept.strict") #0
|
||
|
%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
|
||
|
ret <2 x double> %ret
|
||
|
}
|
||
|
|
||
|
; Test ult selects.
|
||
|
define <2 x double> @f26(<2 x double> %val1, <2 x double> %val2,
|
||
|
<2 x double> %val3, <2 x double> %val4) #0 {
|
||
|
; CHECK-LABEL: f26:
|
||
|
; CHECK: vfchedb [[REG:%v[0-9]+]], %v24, %v26
|
||
|
; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
|
||
|
<2 x double> %val1, <2 x double> %val2,
|
||
|
metadata !"ult",
|
||
|
metadata !"fpexcept.strict") #0
|
||
|
%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
|
||
|
ret <2 x double> %ret
|
||
|
}
|
||
|
|
||
|
; Test ord selects.
|
||
|
define <2 x double> @f27(<2 x double> %val1, <2 x double> %val2,
|
||
|
<2 x double> %val3, <2 x double> %val4) #0 {
|
||
|
; CHECK-LABEL: f27:
|
||
|
; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
|
||
|
; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v24, %v26
|
||
|
; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
|
||
|
; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
|
||
|
<2 x double> %val1, <2 x double> %val2,
|
||
|
metadata !"ord",
|
||
|
metadata !"fpexcept.strict") #0
|
||
|
%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
|
||
|
ret <2 x double> %ret
|
||
|
}
|
||
|
|
||
|
; Test uno selects.
|
||
|
define <2 x double> @f28(<2 x double> %val1, <2 x double> %val2,
|
||
|
<2 x double> %val3, <2 x double> %val4) #0 {
|
||
|
; CHECK-LABEL: f28:
|
||
|
; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
|
||
|
; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v24, %v26
|
||
|
; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
|
||
|
; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
|
||
|
; CHECK-NEXT: br %r14
|
||
|
%cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
|
||
|
<2 x double> %val1, <2 x double> %val2,
|
||
|
metadata !"uno",
|
||
|
metadata !"fpexcept.strict") #0
|
||
|
%ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
|
||
|
ret <2 x double> %ret
|
||
|
}
|
||
|
|
||
|
; Test an f64 comparison that uses vector registers.
|
||
|
define i64 @f29(i64 %a, i64 %b, double %f1, <2 x double> %vec) #0 {
|
||
|
; CHECK-LABEL: f29:
|
||
|
; CHECK: wfcdb %f0, %v24
|
||
|
; CHECK-NEXT: locgrne %r2, %r3
|
||
|
; CHECK: br %r14
|
||
|
%f2 = extractelement <2 x double> %vec, i32 0
|
||
|
%cond = call i1 @llvm.experimental.constrained.fcmp.f64(
|
||
|
double %f1, double %f2,
|
||
|
metadata !"oeq",
|
||
|
metadata !"fpexcept.strict") #0
|
||
|
%res = select i1 %cond, i64 %a, i64 %b
|
||
|
ret i64 %res
|
||
|
}
|
||
|
|
||
|
attributes #0 = { strictfp }
|
||
|
|
||
|
declare <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(<2 x double>, <2 x double>, metadata, metadata)
|
||
|
declare i1 @llvm.experimental.constrained.fcmp.f64(double, double, metadata, metadata)
|
||
|
|