llvm-project/llvm/test/CodeGen/X86/x86-64-shortint.ll

; RUN: llvm-as < %s | llc | grep movswl

target datalayout = "e-p:64:64"
target triple = "x86_64-apple-darwin8"


define void @bar(i16 zeroext  %A) {
        tail call void @foo( i16 %A signext  )
        ret void
}
declare void @foo(i16 signext )
new testcase llvm-svn: 34614 2007-02-26 07:08:29 +08:00			`; RUN: llvm-as < %s \| llc \| grep movswl`

			`target datalayout = "e-p:64:64"`
			`target triple = "x86_64-apple-darwin8"`


For PR1553: Change the keywords for the zext and sext parameter attributes to be zeroext and signext so they don't conflict with the keywords for the instructions of the same name. This gets around the ambiguity. llvm-svn: 40069 2007-07-20 07:13:04 +08:00			`define void @bar(i16 zeroext %A) {`
			`tail call void @foo( i16 %A signext )`
new testcase llvm-svn: 34614 2007-02-26 07:08:29 +08:00			`ret void`
			`}`
For PR1553: Change the keywords for the zext and sext parameter attributes to be zeroext and signext so they don't conflict with the keywords for the instructions of the same name. This gets around the ambiguity. llvm-svn: 40069 2007-07-20 07:13:04 +08:00			`declare void @foo(i16 signext )`
new testcase llvm-svn: 34614 2007-02-26 07:08:29 +08:00