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llvm-project/llvm/test/CodeGen/ARM/arm-storebytesmerge.ll

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[ARM][AArch64][DAG] Reenable post-legalize store merge Reenable post-legalize stores with constant merging computation and corresponding test case. * Properly truncate store merge constants * Disable merging of truncated stores floating points * Ensure merges of constant stores into a single vector are constructed from legal elements. Reviewers: eastig, efriedma Reviewed By: eastig Subscribers: spatel, rengolin, aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D40701 llvm-svn: 319899
2017-12-06 23:30:13 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv7em-arm-none-eabi"
; Function Attrs: nounwind
define arm_aapcs_vfpcc void @test(i8* %v50) #0 {
; CHECK-LABEL: test:
; CHECK: @ %bb.0:
Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." This patch appears to trigger very large compile time increases in halide builds. llvm-svn: 357116
2019-03-28 03:54:41 +08:00
; CHECK-NEXT: movw r1, #65534
; CHECK-NEXT: strh.w r1, [r0, #510]
[DAGCombine] Improve alias analysis for chain of independent stores. FindBetterNeighborChains simulateanously improves the chain dependencies of a chain of related stores avoiding the generation of extra token factors. For chains longer than the GatherAllAliasDepths, stores further down in the chain will necessarily fail, a potentially significant waste and preventing otherwise trivial parallelization. This patch directly parallelize the chains of stores before improving each store. This generally improves DAG-level parallelism. Reviewers: courbet, spatel, RKSimon, bogner, efriedma, craig.topper, rnk Subscribers: sdardis, javed.absar, hiraditya, jrtc27, atanasyan, llvm-commits Differential Revision: https://reviews.llvm.org/D53552 llvm-svn: 346432
2018-11-09 03:14:20 +08:00
; CHECK-NEXT: movw r1, #64506
; CHECK-NEXT: movt r1, #65020
; CHECK-NEXT: str.w r1, [r0, #506]
; CHECK-NEXT: movw r1, #63478
; CHECK-NEXT: movt r1, #63992
; CHECK-NEXT: str.w r1, [r0, #502]
; CHECK-NEXT: movw r1, #62450
; CHECK-NEXT: movt r1, #62964
; CHECK-NEXT: str.w r1, [r0, #498]
; CHECK-NEXT: movw r1, #61422
; CHECK-NEXT: movt r1, #61936
; CHECK-NEXT: str.w r1, [r0, #494]
; CHECK-NEXT: movw r1, #60394
; CHECK-NEXT: movt r1, #60908
; CHECK-NEXT: str.w r1, [r0, #490]
; CHECK-NEXT: movw r1, #59366
; CHECK-NEXT: movt r1, #59880
; CHECK-NEXT: str.w r1, [r0, #486]
; CHECK-NEXT: movw r1, #58338
; CHECK-NEXT: movt r1, #58852
; CHECK-NEXT: str.w r1, [r0, #482]
; CHECK-NEXT: movw r1, #57310
; CHECK-NEXT: movt r1, #57824
; CHECK-NEXT: str.w r1, [r0, #478]
; CHECK-NEXT: movw r1, #56282
; CHECK-NEXT: movt r1, #56796
; CHECK-NEXT: str.w r1, [r0, #474]
; CHECK-NEXT: movw r1, #55254
; CHECK-NEXT: movt r1, #55768
; CHECK-NEXT: str.w r1, [r0, #470]
; CHECK-NEXT: movw r1, #54226
; CHECK-NEXT: movt r1, #54740
; CHECK-NEXT: str.w r1, [r0, #466]
; CHECK-NEXT: movw r1, #53198
; CHECK-NEXT: movt r1, #53712
; CHECK-NEXT: str.w r1, [r0, #462]
; CHECK-NEXT: movw r1, #52170
; CHECK-NEXT: movt r1, #52684
; CHECK-NEXT: str.w r1, [r0, #458]
; CHECK-NEXT: movw r1, #51142
; CHECK-NEXT: movt r1, #51656
; CHECK-NEXT: str.w r1, [r0, #454]
; CHECK-NEXT: movw r1, #50114
; CHECK-NEXT: movt r1, #50628
; CHECK-NEXT: str.w r1, [r0, #450]
; CHECK-NEXT: movw r1, #49086
; CHECK-NEXT: movt r1, #49600
; CHECK-NEXT: str.w r1, [r0, #446]
; CHECK-NEXT: movw r1, #48058
; CHECK-NEXT: movt r1, #48572
; CHECK-NEXT: str.w r1, [r0, #442]
; CHECK-NEXT: movw r1, #47030
; CHECK-NEXT: movt r1, #47544
; CHECK-NEXT: str.w r1, [r0, #438]
[ARM][AArch64][DAG] Reenable post-legalize store merge Reenable post-legalize stores with constant merging computation and corresponding test case. * Properly truncate store merge constants * Disable merging of truncated stores floating points * Ensure merges of constant stores into a single vector are constructed from legal elements. Reviewers: eastig, efriedma Reviewed By: eastig Subscribers: spatel, rengolin, aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D40701 llvm-svn: 319899
2017-12-06 23:30:13 +08:00
; CHECK-NEXT: movw r1, #46002
; CHECK-NEXT: movt r1, #46516
; CHECK-NEXT: str.w r1, [r0, #434]
[DAGCombine] Improve alias analysis for chain of independent stores. FindBetterNeighborChains simulateanously improves the chain dependencies of a chain of related stores avoiding the generation of extra token factors. For chains longer than the GatherAllAliasDepths, stores further down in the chain will necessarily fail, a potentially significant waste and preventing otherwise trivial parallelization. This patch directly parallelize the chains of stores before improving each store. This generally improves DAG-level parallelism. Reviewers: courbet, spatel, RKSimon, bogner, efriedma, craig.topper, rnk Subscribers: sdardis, javed.absar, hiraditya, jrtc27, atanasyan, llvm-commits Differential Revision: https://reviews.llvm.org/D53552 llvm-svn: 346432
2018-11-09 03:14:20 +08:00
; CHECK-NEXT: movw r1, #44974
; CHECK-NEXT: movt r1, #45488
; CHECK-NEXT: str.w r1, [r0, #430]
; CHECK-NEXT: movw r1, #43946
; CHECK-NEXT: movt r1, #44460
; CHECK-NEXT: str.w r1, [r0, #426]
; CHECK-NEXT: movw r1, #42918
; CHECK-NEXT: movt r1, #43432
; CHECK-NEXT: str.w r1, [r0, #422]
; CHECK-NEXT: movw r1, #41890
; CHECK-NEXT: movt r1, #42404
; CHECK-NEXT: str.w r1, [r0, #418]
; CHECK-NEXT: movw r1, #40862
; CHECK-NEXT: movt r1, #41376
; CHECK-NEXT: str.w r1, [r0, #414]
; CHECK-NEXT: movw r1, #39834
; CHECK-NEXT: movt r1, #40348
; CHECK-NEXT: str.w r1, [r0, #410]
; CHECK-NEXT: movw r1, #38806
; CHECK-NEXT: movt r1, #39320
; CHECK-NEXT: str.w r1, [r0, #406]
; CHECK-NEXT: movw r1, #37778
; CHECK-NEXT: movt r1, #38292
; CHECK-NEXT: str.w r1, [r0, #402]
; CHECK-NEXT: movw r1, #36750
; CHECK-NEXT: movt r1, #37264
; CHECK-NEXT: str.w r1, [r0, #398]
; CHECK-NEXT: movw r1, #35722
; CHECK-NEXT: movt r1, #36236
; CHECK-NEXT: str.w r1, [r0, #394]
[ARM][AArch64][DAG] Reenable post-legalize store merge Reenable post-legalize stores with constant merging computation and corresponding test case. * Properly truncate store merge constants * Disable merging of truncated stores floating points * Ensure merges of constant stores into a single vector are constructed from legal elements. Reviewers: eastig, efriedma Reviewed By: eastig Subscribers: spatel, rengolin, aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D40701 llvm-svn: 319899
2017-12-06 23:30:13 +08:00
; CHECK-NEXT: bx lr
%v190 = getelementptr inbounds i8, i8* %v50, i32 394
store i8 -118, i8* %v190, align 1
%v191 = getelementptr inbounds i8, i8* %v50, i32 395
store i8 -117, i8* %v191, align 1
%v192 = getelementptr inbounds i8, i8* %v50, i32 396
store i8 -116, i8* %v192, align 1
%v193 = getelementptr inbounds i8, i8* %v50, i32 397
store i8 -115, i8* %v193, align 1
%v194 = getelementptr inbounds i8, i8* %v50, i32 398
store i8 -114, i8* %v194, align 1
%v195 = getelementptr inbounds i8, i8* %v50, i32 399
store i8 -113, i8* %v195, align 1
%v196 = getelementptr inbounds i8, i8* %v50, i32 400
store i8 -112, i8* %v196, align 1
%v197 = getelementptr inbounds i8, i8* %v50, i32 401
store i8 -111, i8* %v197, align 1
%v198 = getelementptr inbounds i8, i8* %v50, i32 402
store i8 -110, i8* %v198, align 1
%v199 = getelementptr inbounds i8, i8* %v50, i32 403
store i8 -109, i8* %v199, align 1
%v200 = getelementptr inbounds i8, i8* %v50, i32 404
store i8 -108, i8* %v200, align 1
%v201 = getelementptr inbounds i8, i8* %v50, i32 405
store i8 -107, i8* %v201, align 1
%v202 = getelementptr inbounds i8, i8* %v50, i32 406
store i8 -106, i8* %v202, align 1
%v203 = getelementptr inbounds i8, i8* %v50, i32 407
store i8 -105, i8* %v203, align 1
%v204 = getelementptr inbounds i8, i8* %v50, i32 408
store i8 -104, i8* %v204, align 1
%v205 = getelementptr inbounds i8, i8* %v50, i32 409
store i8 -103, i8* %v205, align 1
%v206 = getelementptr inbounds i8, i8* %v50, i32 410
store i8 -102, i8* %v206, align 1
%v207 = getelementptr inbounds i8, i8* %v50, i32 411
store i8 -101, i8* %v207, align 1
%v208 = getelementptr inbounds i8, i8* %v50, i32 412
store i8 -100, i8* %v208, align 1
%v209 = getelementptr inbounds i8, i8* %v50, i32 413
store i8 -99, i8* %v209, align 1
%v210 = getelementptr inbounds i8, i8* %v50, i32 414
store i8 -98, i8* %v210, align 1
%v211 = getelementptr inbounds i8, i8* %v50, i32 415
store i8 -97, i8* %v211, align 1
%v212 = getelementptr inbounds i8, i8* %v50, i32 416
store i8 -96, i8* %v212, align 1
%v213 = getelementptr inbounds i8, i8* %v50, i32 417
store i8 -95, i8* %v213, align 1
%v214 = getelementptr inbounds i8, i8* %v50, i32 418
store i8 -94, i8* %v214, align 1
%v215 = getelementptr inbounds i8, i8* %v50, i32 419
store i8 -93, i8* %v215, align 1
%v216 = getelementptr inbounds i8, i8* %v50, i32 420
store i8 -92, i8* %v216, align 1
%v217 = getelementptr inbounds i8, i8* %v50, i32 421
store i8 -91, i8* %v217, align 1
%v218 = getelementptr inbounds i8, i8* %v50, i32 422
store i8 -90, i8* %v218, align 1
%v219 = getelementptr inbounds i8, i8* %v50, i32 423
store i8 -89, i8* %v219, align 1
%v220 = getelementptr inbounds i8, i8* %v50, i32 424
store i8 -88, i8* %v220, align 1
%v221 = getelementptr inbounds i8, i8* %v50, i32 425
store i8 -87, i8* %v221, align 1
%v222 = getelementptr inbounds i8, i8* %v50, i32 426
store i8 -86, i8* %v222, align 1
%v223 = getelementptr inbounds i8, i8* %v50, i32 427
store i8 -85, i8* %v223, align 1
%v224 = getelementptr inbounds i8, i8* %v50, i32 428
store i8 -84, i8* %v224, align 1
%v225 = getelementptr inbounds i8, i8* %v50, i32 429
store i8 -83, i8* %v225, align 1
%v226 = getelementptr inbounds i8, i8* %v50, i32 430
store i8 -82, i8* %v226, align 1
%v227 = getelementptr inbounds i8, i8* %v50, i32 431
store i8 -81, i8* %v227, align 1
%v228 = getelementptr inbounds i8, i8* %v50, i32 432
store i8 -80, i8* %v228, align 1
%v229 = getelementptr inbounds i8, i8* %v50, i32 433
store i8 -79, i8* %v229, align 1
%v230 = getelementptr inbounds i8, i8* %v50, i32 434
store i8 -78, i8* %v230, align 1
%v231 = getelementptr inbounds i8, i8* %v50, i32 435
store i8 -77, i8* %v231, align 1
%v232 = getelementptr inbounds i8, i8* %v50, i32 436
store i8 -76, i8* %v232, align 1
%v233 = getelementptr inbounds i8, i8* %v50, i32 437
store i8 -75, i8* %v233, align 1
%v234 = getelementptr inbounds i8, i8* %v50, i32 438
store i8 -74, i8* %v234, align 1
%v235 = getelementptr inbounds i8, i8* %v50, i32 439
store i8 -73, i8* %v235, align 1
%v236 = getelementptr inbounds i8, i8* %v50, i32 440
store i8 -72, i8* %v236, align 1
%v237 = getelementptr inbounds i8, i8* %v50, i32 441
store i8 -71, i8* %v237, align 1
%v238 = getelementptr inbounds i8, i8* %v50, i32 442
store i8 -70, i8* %v238, align 1
%v239 = getelementptr inbounds i8, i8* %v50, i32 443
store i8 -69, i8* %v239, align 1
%v240 = getelementptr inbounds i8, i8* %v50, i32 444
store i8 -68, i8* %v240, align 1
%v241 = getelementptr inbounds i8, i8* %v50, i32 445
store i8 -67, i8* %v241, align 1
%v242 = getelementptr inbounds i8, i8* %v50, i32 446
store i8 -66, i8* %v242, align 1
%v243 = getelementptr inbounds i8, i8* %v50, i32 447
store i8 -65, i8* %v243, align 1
%v244 = getelementptr inbounds i8, i8* %v50, i32 448
store i8 -64, i8* %v244, align 1
%v245 = getelementptr inbounds i8, i8* %v50, i32 449
store i8 -63, i8* %v245, align 1
%v246 = getelementptr inbounds i8, i8* %v50, i32 450
store i8 -62, i8* %v246, align 1
%v247 = getelementptr inbounds i8, i8* %v50, i32 451
store i8 -61, i8* %v247, align 1
%v248 = getelementptr inbounds i8, i8* %v50, i32 452
store i8 -60, i8* %v248, align 1
%v249 = getelementptr inbounds i8, i8* %v50, i32 453
store i8 -59, i8* %v249, align 1
%v250 = getelementptr inbounds i8, i8* %v50, i32 454
store i8 -58, i8* %v250, align 1
%v251 = getelementptr inbounds i8, i8* %v50, i32 455
store i8 -57, i8* %v251, align 1
%v252 = getelementptr inbounds i8, i8* %v50, i32 456
store i8 -56, i8* %v252, align 1
%v253 = getelementptr inbounds i8, i8* %v50, i32 457
store i8 -55, i8* %v253, align 1
%v254 = getelementptr inbounds i8, i8* %v50, i32 458
store i8 -54, i8* %v254, align 1
%v255 = getelementptr inbounds i8, i8* %v50, i32 459
store i8 -53, i8* %v255, align 1
%v256 = getelementptr inbounds i8, i8* %v50, i32 460
store i8 -52, i8* %v256, align 1
%v257 = getelementptr inbounds i8, i8* %v50, i32 461
store i8 -51, i8* %v257, align 1
%v258 = getelementptr inbounds i8, i8* %v50, i32 462
store i8 -50, i8* %v258, align 1
%v259 = getelementptr inbounds i8, i8* %v50, i32 463
store i8 -49, i8* %v259, align 1
%v260 = getelementptr inbounds i8, i8* %v50, i32 464
store i8 -48, i8* %v260, align 1
%v261 = getelementptr inbounds i8, i8* %v50, i32 465
store i8 -47, i8* %v261, align 1
%v262 = getelementptr inbounds i8, i8* %v50, i32 466
store i8 -46, i8* %v262, align 1
%v263 = getelementptr inbounds i8, i8* %v50, i32 467
store i8 -45, i8* %v263, align 1
%v264 = getelementptr inbounds i8, i8* %v50, i32 468
store i8 -44, i8* %v264, align 1
%v265 = getelementptr inbounds i8, i8* %v50, i32 469
store i8 -43, i8* %v265, align 1
%v266 = getelementptr inbounds i8, i8* %v50, i32 470
store i8 -42, i8* %v266, align 1
%v267 = getelementptr inbounds i8, i8* %v50, i32 471
store i8 -41, i8* %v267, align 1
%v268 = getelementptr inbounds i8, i8* %v50, i32 472
store i8 -40, i8* %v268, align 1
%v269 = getelementptr inbounds i8, i8* %v50, i32 473
store i8 -39, i8* %v269, align 1
%v270 = getelementptr inbounds i8, i8* %v50, i32 474
store i8 -38, i8* %v270, align 1
%v271 = getelementptr inbounds i8, i8* %v50, i32 475
store i8 -37, i8* %v271, align 1
%v272 = getelementptr inbounds i8, i8* %v50, i32 476
store i8 -36, i8* %v272, align 1
%v273 = getelementptr inbounds i8, i8* %v50, i32 477
store i8 -35, i8* %v273, align 1
%v274 = getelementptr inbounds i8, i8* %v50, i32 478
store i8 -34, i8* %v274, align 1
%v275 = getelementptr inbounds i8, i8* %v50, i32 479
store i8 -33, i8* %v275, align 1
%v276 = getelementptr inbounds i8, i8* %v50, i32 480
store i8 -32, i8* %v276, align 1
%v277 = getelementptr inbounds i8, i8* %v50, i32 481
store i8 -31, i8* %v277, align 1
%v278 = getelementptr inbounds i8, i8* %v50, i32 482
store i8 -30, i8* %v278, align 1
%v279 = getelementptr inbounds i8, i8* %v50, i32 483
store i8 -29, i8* %v279, align 1
%v280 = getelementptr inbounds i8, i8* %v50, i32 484
store i8 -28, i8* %v280, align 1
%v281 = getelementptr inbounds i8, i8* %v50, i32 485
store i8 -27, i8* %v281, align 1
%v282 = getelementptr inbounds i8, i8* %v50, i32 486
store i8 -26, i8* %v282, align 1
%v283 = getelementptr inbounds i8, i8* %v50, i32 487
store i8 -25, i8* %v283, align 1
%v284 = getelementptr inbounds i8, i8* %v50, i32 488
store i8 -24, i8* %v284, align 1
%v285 = getelementptr inbounds i8, i8* %v50, i32 489
store i8 -23, i8* %v285, align 1
%v286 = getelementptr inbounds i8, i8* %v50, i32 490
store i8 -22, i8* %v286, align 1
%v287 = getelementptr inbounds i8, i8* %v50, i32 491
store i8 -21, i8* %v287, align 1
%v288 = getelementptr inbounds i8, i8* %v50, i32 492
store i8 -20, i8* %v288, align 1
%v289 = getelementptr inbounds i8, i8* %v50, i32 493
store i8 -19, i8* %v289, align 1
%v290 = getelementptr inbounds i8, i8* %v50, i32 494
store i8 -18, i8* %v290, align 1
%v291 = getelementptr inbounds i8, i8* %v50, i32 495
store i8 -17, i8* %v291, align 1
%v292 = getelementptr inbounds i8, i8* %v50, i32 496
store i8 -16, i8* %v292, align 1
%v293 = getelementptr inbounds i8, i8* %v50, i32 497
store i8 -15, i8* %v293, align 1
%v294 = getelementptr inbounds i8, i8* %v50, i32 498
store i8 -14, i8* %v294, align 1
%v295 = getelementptr inbounds i8, i8* %v50, i32 499
store i8 -13, i8* %v295, align 1
%v296 = getelementptr inbounds i8, i8* %v50, i32 500
store i8 -12, i8* %v296, align 1
%v297 = getelementptr inbounds i8, i8* %v50, i32 501
store i8 -11, i8* %v297, align 1
%v298 = getelementptr inbounds i8, i8* %v50, i32 502
store i8 -10, i8* %v298, align 1
%v299 = getelementptr inbounds i8, i8* %v50, i32 503
store i8 -9, i8* %v299, align 1
%v300 = getelementptr inbounds i8, i8* %v50, i32 504
store i8 -8, i8* %v300, align 1
%v301 = getelementptr inbounds i8, i8* %v50, i32 505
store i8 -7, i8* %v301, align 1
%v302 = getelementptr inbounds i8, i8* %v50, i32 506
store i8 -6, i8* %v302, align 1
%v303 = getelementptr inbounds i8, i8* %v50, i32 507
store i8 -5, i8* %v303, align 1
%v304 = getelementptr inbounds i8, i8* %v50, i32 508
store i8 -4, i8* %v304, align 1
%v305 = getelementptr inbounds i8, i8* %v50, i32 509
store i8 -3, i8* %v305, align 1
%v306 = getelementptr inbounds i8, i8* %v50, i32 510
store i8 -2, i8* %v306, align 1
%v307 = getelementptr inbounds i8, i8* %v50, i32 511
store i8 -1, i8* %v307, align 1
ret void
}
[ARM] Replace fp-only-sp and d16 with fp64 and d32. Those two subtarget features were awkward because their semantics are reversed: each one indicates the _lack_ of support for something in the architecture, rather than the presence. As a consequence, you don't get the behavior you want if you combine two sets of feature bits. Each SubtargetFeature for an FP architecture version now comes in four versions, one for each combination of those options. So you can still say (for example) '+vfp2' in a feature string and it will mean what it's always meant, but there's a new string '+vfp2d16sp' meaning the version without those extra options. A lot of this change is just mechanically replacing positive checks for the old features with negative checks for the new ones. But one more interesting change is that I've rearranged getFPUFeatures() so that the main FPU feature is appended to the output list *before* rather than after the features derived from the Restriction field, so that -fp64 and -d32 can override defaults added by the main feature. Reviewers: dmgreen, samparker, SjoerdMeijer Subscribers: srhines, javed.absar, eraman, kristof.beyls, hiraditya, zzheng, Petar.Avramovic, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D60691 llvm-svn: 361845
2019-05-29 00:13:20 +08:00
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="preserve-sign" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m7" "target-features"="-d32,+dsp,+fp-armv8,+hwdiv,+thumb-mode,-crc,-crypto,-dotprod,-fullfp16,-hwdiv-arm,-neon,-ras" "unsafe-fp-math"="false" "use-soft-float"="false" }
[ARM][AArch64][DAG] Reenable post-legalize store merge Reenable post-legalize stores with constant merging computation and corresponding test case. * Properly truncate store merge constants * Disable merging of truncated stores floating points * Ensure merges of constant stores into a single vector are constructed from legal elements. Reviewers: eastig, efriedma Reviewed By: eastig Subscribers: spatel, rengolin, aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D40701 llvm-svn: 319899
2017-12-06 23:30:13 +08:00