2015-11-27 04:53:28 +08:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
2016-07-23 15:16:56 +08:00
|
|
|
; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
|
2015-11-27 04:53:28 +08:00
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA
|
2015-12-01 06:22:06 +08:00
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+fma -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA4
|
2015-11-27 04:53:28 +08:00
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4 -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA4
|
2015-12-02 17:07:55 +08:00
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=AVX512
|
2015-09-12 23:33:05 +08:00
|
|
|
|
2015-09-22 04:32:48 +08:00
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; Pattern: (fadd (fmul x, y), z) -> (fmadd x,y,z)
|
2015-09-22 04:32:48 +08:00
|
|
|
;
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define float @test_f32_fmadd(float %a0, float %a1, float %a2) {
|
|
|
|
; FMA-LABEL: test_f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmaddss %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul float %a0, %a1
|
|
|
|
%res = fadd float %x, %a2
|
|
|
|
ret float %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <4 x float> @test_4f32_fmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_4f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmadd213ps %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_4f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmaddps %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_4f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vfmadd213ps %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2012-08-02 00:42:35 +08:00
|
|
|
%x = fmul <4 x float> %a0, %a1
|
2015-11-28 22:28:44 +08:00
|
|
|
%res = fadd <4 x float> %x, %a2
|
2012-08-02 00:42:35 +08:00
|
|
|
ret <4 x float> %res
|
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <8 x float> @test_8f32_fmadd(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_8f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmadd213ps %ymm2, %ymm1, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_8f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmaddps %ymm2, %ymm1, %ymm0, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_8f32_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vfmadd213ps %ymm2, %ymm1, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul <8 x float> %a0, %a1
|
|
|
|
%res = fadd <8 x float> %x, %a2
|
|
|
|
ret <8 x float> %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define double @test_f64_fmadd(double %a0, double %a1, double %a2) {
|
|
|
|
; FMA-LABEL: test_f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmaddsd %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul double %a0, %a1
|
|
|
|
%res = fadd double %x, %a2
|
|
|
|
ret double %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <2 x double> @test_2f64_fmadd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_2f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmadd213pd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_2f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmaddpd %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_2f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vfmadd213pd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul <2 x double> %a0, %a1
|
|
|
|
%res = fadd <2 x double> %x, %a2
|
|
|
|
ret <2 x double> %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <4 x double> @test_4f64_fmadd(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_4f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmadd213pd %ymm2, %ymm1, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_4f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmaddpd %ymm2, %ymm1, %ymm0, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_4f64_fmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vfmadd213pd %ymm2, %ymm1, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul <4 x double> %a0, %a1
|
|
|
|
%res = fadd <4 x double> %x, %a2
|
|
|
|
ret <4 x double> %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
;
|
|
|
|
; Pattern: (fsub (fmul x, y), z) -> (fmsub x, y, z)
|
|
|
|
;
|
|
|
|
|
|
|
|
define float @test_f32_fmsub(float %a0, float %a1, float %a2) {
|
|
|
|
; FMA-LABEL: test_f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmsubss %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul float %a0, %a1
|
|
|
|
%res = fsub float %x, %a2
|
|
|
|
ret float %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <4 x float> @test_4f32_fmsub(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_4f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmsub213ps %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_4f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmsubps %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_4f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vfmsub213ps %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul <4 x float> %a0, %a1
|
|
|
|
%res = fsub <4 x float> %x, %a2
|
|
|
|
ret <4 x float> %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <8 x float> @test_8f32_fmsub(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_8f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmsub213ps %ymm2, %ymm1, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_8f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmsubps %ymm2, %ymm1, %ymm0, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_8f32_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vfmsub213ps %ymm2, %ymm1, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul <8 x float> %a0, %a1
|
|
|
|
%res = fsub <8 x float> %x, %a2
|
|
|
|
ret <8 x float> %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define double @test_f64_fmsub(double %a0, double %a1, double %a2) {
|
|
|
|
; FMA-LABEL: test_f64_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmsub213sd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_f64_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmsubsd %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_f64_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmsub213sd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul double %a0, %a1
|
|
|
|
%res = fsub double %x, %a2
|
|
|
|
ret double %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <2 x double> @test_2f64_fmsub(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_2f64_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmsub213pd %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_2f64_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmsubpd %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_2f64_fmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmsub213pd %xmm2, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2012-08-02 00:42:35 +08:00
|
|
|
%x = fmul <2 x double> %a0, %a1
|
|
|
|
%res = fsub <2 x double> %x, %a2
|
|
|
|
ret <2 x double> %res
|
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <4 x double> @test_4f64_fmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_4f64_fmsub:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmsub213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_4f64_fmsub:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmsubpd %ymm2, %ymm1, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_4f64_fmsub:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmsub213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <4 x double> %a0, %a1
|
|
|
|
%res = fsub <4 x double> %x, %a2
|
|
|
|
ret <4 x double> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
;
|
|
|
|
; Pattern: (fsub z, (fmul x, y)) -> (fnmadd x, y, z)
|
|
|
|
;
|
|
|
|
|
|
|
|
define float @test_f32_fnmadd(float %a0, float %a1, float %a2) {
|
|
|
|
; FMA-LABEL: test_f32_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ss %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_f32_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddss %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_f32_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmadd213ss %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2012-08-02 00:42:35 +08:00
|
|
|
%x = fmul float %a0, %a1
|
|
|
|
%res = fsub float %a2, %x
|
|
|
|
ret float %res
|
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <4 x float> @test_4f32_fnmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_4f32_fnmadd:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_4f32_fnmadd:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_4f32_fnmadd:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <4 x float> %a0, %a1
|
|
|
|
%res = fsub <4 x float> %a2, %x
|
|
|
|
ret <4 x float> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
define <8 x float> @test_8f32_fnmadd(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_8f32_fnmadd:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_8f32_fnmadd:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_8f32_fnmadd:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <8 x float> %a0, %a1
|
|
|
|
%res = fsub <8 x float> %a2, %x
|
|
|
|
ret <8 x float> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
define double @test_f64_fnmadd(double %a0, double %a1, double %a2) {
|
|
|
|
; FMA-LABEL: test_f64_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213sd %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_f64_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddsd %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_f64_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmadd213sd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2012-08-02 00:42:35 +08:00
|
|
|
%x = fmul double %a0, %a1
|
|
|
|
%res = fsub double %a2, %x
|
|
|
|
ret double %res
|
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <2 x double> @test_2f64_fnmadd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_2f64_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfnmadd213pd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_2f64_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfnmaddpd %xmm2, %xmm1, %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_2f64_fnmadd:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vfnmadd213pd %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul <2 x double> %a0, %a1
|
|
|
|
%res = fsub <2 x double> %a2, %x
|
|
|
|
ret <2 x double> %res
|
2012-08-02 00:42:35 +08:00
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <4 x double> @test_4f64_fnmadd(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_4f64_fnmadd:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_4f64_fnmadd:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddpd %ymm2, %ymm1, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_4f64_fnmadd:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <4 x double> %a0, %a1
|
|
|
|
%res = fsub <4 x double> %a2, %x
|
|
|
|
ret <4 x double> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
;
|
|
|
|
; Pattern: (fsub (fneg (fmul x, y)), z) -> (fnmsub x, y, z)
|
|
|
|
;
|
|
|
|
|
|
|
|
define float @test_f32_fnmsub(float %a0, float %a1, float %a2) {
|
|
|
|
; FMA-LABEL: test_f32_fnmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213ss %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_f32_fnmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubss %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_f32_fnmsub:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmsub213ss %xmm2, %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = fmul float %a0, %a1
|
|
|
|
%y = fsub float -0.000000e+00, %x
|
2012-08-02 00:42:35 +08:00
|
|
|
%res = fsub float %y, %a2
|
|
|
|
ret float %res
|
|
|
|
}
|
2012-09-01 07:10:34 +08:00
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <4 x float> @test_4f32_fnmsub(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_4f32_fnmsub:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213ps %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_4f32_fnmsub:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubps %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_4f32_fnmsub:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmsub213ps %xmm2, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <4 x float> %a0, %a1
|
|
|
|
%y = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x
|
|
|
|
%res = fsub <4 x float> %y, %a2
|
|
|
|
ret <4 x float> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
define <8 x float> @test_8f32_fnmsub(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_8f32_fnmsub:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213ps %ymm2, %ymm1, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_8f32_fnmsub:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubps %ymm2, %ymm1, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_8f32_fnmsub:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmsub213ps %ymm2, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <8 x float> %a0, %a1
|
|
|
|
%y = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x
|
|
|
|
%res = fsub <8 x float> %y, %a2
|
|
|
|
ret <8 x float> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
define double @test_f64_fnmsub(double %a0, double %a1, double %a2) {
|
|
|
|
; FMA-LABEL: test_f64_fnmsub:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_f64_fnmsub:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubsd %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_f64_fnmsub:
|
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul double %a0, %a1
|
|
|
|
%y = fsub double -0.000000e+00, %x
|
|
|
|
%res = fsub double %y, %a2
|
|
|
|
ret double %res
|
|
|
|
}
|
|
|
|
|
|
|
|
define <2 x double> @test_2f64_fnmsub(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_2f64_fnmsub:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213pd %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_2f64_fnmsub:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubpd %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_2f64_fnmsub:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmsub213pd %xmm2, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <2 x double> %a0, %a1
|
|
|
|
%y = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %x
|
|
|
|
%res = fsub <2 x double> %y, %a2
|
|
|
|
ret <2 x double> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x double> @test_4f64_fnmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_4f64_fnmsub:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_4f64_fnmsub:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubpd %ymm2, %ymm1, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_4f64_fnmsub:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmsub213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fmul <4 x double> %a0, %a1
|
|
|
|
%y = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %x
|
|
|
|
%res = fsub <4 x double> %y, %a2
|
|
|
|
ret <4 x double> %res
|
|
|
|
}
|
|
|
|
|
|
|
|
;
|
|
|
|
; Load Folding Patterns
|
|
|
|
;
|
|
|
|
|
|
|
|
define <4 x float> @test_4f32_fmadd_load(<4 x float>* %a0, <4 x float> %a1, <4 x float> %a2) {
|
|
|
|
; FMA-LABEL: test_4f32_fmadd_load:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmadd132ps (%rdi), %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_4f32_fmadd_load:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmaddps %xmm1, (%rdi), %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_4f32_fmadd_load:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vmovaps (%rdi), %xmm2
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmadd213ps %xmm1, %xmm2, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-02-28 05:17:42 +08:00
|
|
|
%x = load <4 x float>, <4 x float>* %a0
|
2012-09-01 07:10:34 +08:00
|
|
|
%y = fmul <4 x float> %x, %a1
|
|
|
|
%res = fadd <4 x float> %y, %a2
|
|
|
|
ret <4 x float> %res
|
|
|
|
}
|
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
define <2 x double> @test_2f64_fmsub_load(<2 x double>* %a0, <2 x double> %a1, <2 x double> %a2) {
|
|
|
|
; FMA-LABEL: test_2f64_fmsub_load:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA-NEXT: vfmsub132pd (%rdi), %xmm1, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-LABEL: test_2f64_fmsub_load:
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; FMA4-NEXT: vfmsubpd %xmm1, (%rdi), %xmm0, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-LABEL: test_2f64_fmsub_load:
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512: # BB#0:
|
2015-11-28 22:28:44 +08:00
|
|
|
; AVX512-NEXT: vmovapd (%rdi), %xmm2
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmsub213pd %xmm1, %xmm2, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-11-28 22:28:44 +08:00
|
|
|
%x = load <2 x double>, <2 x double>* %a0
|
|
|
|
%y = fmul <2 x double> %x, %a1
|
|
|
|
%res = fsub <2 x double> %y, %a2
|
|
|
|
ret <2 x double> %res
|
2012-09-01 07:10:34 +08:00
|
|
|
}
|
|
|
|
|
2015-09-22 04:32:48 +08:00
|
|
|
;
|
|
|
|
; Patterns (+ fneg variants): mul(add(1.0,x),y), mul(sub(1.0,x),y), mul(sub(x,1.0),y)
|
|
|
|
;
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_add_x_one_y(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_add_x_one_y:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_add_x_one_y:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmaddps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_add_x_one_y:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%a = fadd <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>
|
|
|
|
%m = fmul <4 x float> %a, %y
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_y_add_x_one(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_y_add_x_one:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_y_add_x_one:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmaddps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_y_add_x_one:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%a = fadd <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>
|
|
|
|
%m = fmul <4 x float> %y, %a
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_add_x_negone_y(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_add_x_negone_y:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_add_x_negone_y:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmsubps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_add_x_negone_y:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%a = fadd <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>
|
|
|
|
%m = fmul <4 x float> %a, %y
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_y_add_x_negone(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_y_add_x_negone:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_y_add_x_negone:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmsubps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_y_add_x_negone:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%a = fadd <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>
|
|
|
|
%m = fmul <4 x float> %y, %a
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_sub_one_x_y(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_sub_one_x_y:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_sub_one_x_y:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_sub_one_x_y:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x
|
|
|
|
%m = fmul <4 x float> %s, %y
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_y_sub_one_x(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_y_sub_one_x:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_y_sub_one_x:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_y_sub_one_x:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x
|
|
|
|
%m = fmul <4 x float> %y, %s
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_sub_negone_x_y(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_sub_negone_x_y:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_sub_negone_x_y:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_sub_negone_x_y:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>, %x
|
|
|
|
%m = fmul <4 x float> %s, %y
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_y_sub_negone_x(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_y_sub_negone_x:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_y_sub_negone_x:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_y_sub_negone_x:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>, %x
|
|
|
|
%m = fmul <4 x float> %y, %s
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_sub_x_one_y(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_sub_x_one_y:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_sub_x_one_y:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmsubps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_sub_x_one_y:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>
|
|
|
|
%m = fmul <4 x float> %s, %y
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_y_sub_x_one(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_y_sub_x_one:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_y_sub_x_one:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmsubps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_y_sub_x_one:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmsub213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>
|
|
|
|
%m = fmul <4 x float> %y, %s
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_sub_x_negone_y(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_sub_x_negone_y:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_sub_x_negone_y:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmaddps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_sub_x_negone_y:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>
|
|
|
|
%m = fmul <4 x float> %s, %y
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_mul_y_sub_x_negone(<4 x float> %x, <4 x float> %y) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_mul_y_sub_x_negone:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_mul_y_sub_x_negone:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfmaddps %xmm1, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_mul_y_sub_x_negone:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfmadd213ps %xmm1, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%s = fsub <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>
|
|
|
|
%m = fmul <4 x float> %y, %s
|
|
|
|
ret <4 x float> %m
|
|
|
|
}
|
|
|
|
|
|
|
|
;
|
|
|
|
; Interpolation Patterns: add(mul(x,t),mul(sub(1.0,t),y))
|
|
|
|
;
|
|
|
|
|
|
|
|
define float @test_f32_interp(float %x, float %y, float %t) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_f32_interp:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ss %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA-NEXT: vfmadd213ss %xmm1, %xmm2, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_f32_interp:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddss %xmm1, %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA4-NEXT: vfmaddss %xmm1, %xmm2, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_f32_interp:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213ss %xmm1, %xmm2, %xmm1
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmadd213ss %xmm1, %xmm2, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%t1 = fsub float 1.0, %t
|
|
|
|
%tx = fmul float %x, %t
|
|
|
|
%ty = fmul float %y, %t1
|
|
|
|
%r = fadd float %tx, %ty
|
|
|
|
ret float %r
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_interp(<4 x float> %x, <4 x float> %y, <4 x float> %t) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_interp:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ps %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA-NEXT: vfmadd213ps %xmm1, %xmm2, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_interp:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddps %xmm1, %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA4-NEXT: vfmaddps %xmm1, %xmm2, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_interp:
|
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmadd213ps %xmm1, %xmm2, %xmm1
|
|
|
|
; AVX512-NEXT: vfmadd213ps %xmm1, %xmm2, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%t1 = fsub <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %t
|
|
|
|
%tx = fmul <4 x float> %x, %t
|
|
|
|
%ty = fmul <4 x float> %y, %t1
|
|
|
|
%r = fadd <4 x float> %tx, %ty
|
|
|
|
ret <4 x float> %r
|
|
|
|
}
|
|
|
|
|
|
|
|
define <8 x float> @test_v8f32_interp(<8 x float> %x, <8 x float> %y, <8 x float> %t) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v8f32_interp:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213ps %ymm1, %ymm2, %ymm1
|
|
|
|
; FMA-NEXT: vfmadd213ps %ymm1, %ymm2, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v8f32_interp:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddps %ymm1, %ymm1, %ymm2, %ymm1
|
|
|
|
; FMA4-NEXT: vfmaddps %ymm1, %ymm2, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v8f32_interp:
|
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmadd213ps %ymm1, %ymm2, %ymm1
|
|
|
|
; AVX512-NEXT: vfmadd213ps %ymm1, %ymm2, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%t1 = fsub <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %t
|
|
|
|
%tx = fmul <8 x float> %x, %t
|
|
|
|
%ty = fmul <8 x float> %y, %t1
|
|
|
|
%r = fadd <8 x float> %tx, %ty
|
|
|
|
ret <8 x float> %r
|
|
|
|
}
|
|
|
|
|
|
|
|
define double @test_f64_interp(double %x, double %y, double %t) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_f64_interp:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213sd %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA-NEXT: vfmadd213sd %xmm1, %xmm2, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_f64_interp:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddsd %xmm1, %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA4-NEXT: vfmaddsd %xmm1, %xmm2, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_f64_interp:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213sd %xmm1, %xmm2, %xmm1
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfmadd213sd %xmm1, %xmm2, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%t1 = fsub double 1.0, %t
|
|
|
|
%tx = fmul double %x, %t
|
|
|
|
%ty = fmul double %y, %t1
|
|
|
|
%r = fadd double %tx, %ty
|
|
|
|
ret double %r
|
|
|
|
}
|
|
|
|
|
|
|
|
define <2 x double> @test_v2f64_interp(<2 x double> %x, <2 x double> %y, <2 x double> %t) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v2f64_interp:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213pd %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA-NEXT: vfmadd213pd %xmm1, %xmm2, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v2f64_interp:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddpd %xmm1, %xmm1, %xmm2, %xmm1
|
|
|
|
; FMA4-NEXT: vfmaddpd %xmm1, %xmm2, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v2f64_interp:
|
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmadd213pd %xmm1, %xmm2, %xmm1
|
|
|
|
; AVX512-NEXT: vfmadd213pd %xmm1, %xmm2, %xmm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%t1 = fsub <2 x double> <double 1.0, double 1.0>, %t
|
|
|
|
%tx = fmul <2 x double> %x, %t
|
|
|
|
%ty = fmul <2 x double> %y, %t1
|
|
|
|
%r = fadd <2 x double> %tx, %ty
|
|
|
|
ret <2 x double> %r
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x double> @test_v4f64_interp(<4 x double> %x, <4 x double> %y, <4 x double> %t) {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f64_interp:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213pd %ymm1, %ymm2, %ymm1
|
|
|
|
; FMA-NEXT: vfmadd213pd %ymm1, %ymm2, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f64_interp:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddpd %ymm1, %ymm1, %ymm2, %ymm1
|
|
|
|
; FMA4-NEXT: vfmaddpd %ymm1, %ymm2, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f64_interp:
|
|
|
|
; AVX512: # BB#0:
|
2016-07-23 15:16:56 +08:00
|
|
|
; AVX512-NEXT: vfnmadd213pd %ymm1, %ymm2, %ymm1
|
|
|
|
; AVX512-NEXT: vfmadd213pd %ymm1, %ymm2, %ymm0
|
2015-11-27 04:53:28 +08:00
|
|
|
; AVX512-NEXT: retq
|
2015-09-22 04:32:48 +08:00
|
|
|
%t1 = fsub <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, %t
|
|
|
|
%tx = fmul <4 x double> %x, %t
|
|
|
|
%ty = fmul <4 x double> %y, %t1
|
|
|
|
%r = fadd <4 x double> %tx, %ty
|
|
|
|
ret <4 x double> %r
|
|
|
|
}
|
2015-10-12 03:48:12 +08:00
|
|
|
|
2015-11-28 22:28:44 +08:00
|
|
|
;
|
|
|
|
; Pattern: (fneg (fma x, y, z)) -> (fma x, -y, -z)
|
|
|
|
;
|
2015-11-25 04:31:46 +08:00
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_fneg_fmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) #0 {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f32_fneg_fmadd:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmsub213ps %xmm2, %xmm1, %xmm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f32_fneg_fmadd:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmsubps %xmm2, %xmm1, %xmm0, %xmm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f32_fneg_fmadd:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmsub213ps %xmm2, %xmm1, %xmm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-11-25 04:31:46 +08:00
|
|
|
%mul = fmul <4 x float> %a0, %a1
|
|
|
|
%add = fadd <4 x float> %mul, %a2
|
|
|
|
%neg = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %add
|
|
|
|
ret <4 x float> %neg
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x double> @test_v4f64_fneg_fmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) #0 {
|
2015-11-27 04:53:28 +08:00
|
|
|
; FMA-LABEL: test_v4f64_fneg_fmsub:
|
|
|
|
; FMA: # BB#0:
|
|
|
|
; FMA-NEXT: vfnmadd213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; FMA-NEXT: retq
|
|
|
|
;
|
|
|
|
; FMA4-LABEL: test_v4f64_fneg_fmsub:
|
|
|
|
; FMA4: # BB#0:
|
|
|
|
; FMA4-NEXT: vfnmaddpd %ymm2, %ymm1, %ymm0, %ymm0
|
|
|
|
; FMA4-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: test_v4f64_fneg_fmsub:
|
|
|
|
; AVX512: # BB#0:
|
|
|
|
; AVX512-NEXT: vfnmadd213pd %ymm2, %ymm1, %ymm0
|
|
|
|
; AVX512-NEXT: retq
|
2015-11-25 04:31:46 +08:00
|
|
|
%mul = fmul <4 x double> %a0, %a1
|
|
|
|
%sub = fsub <4 x double> %mul, %a2
|
|
|
|
%neg = fsub <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %sub
|
|
|
|
ret <4 x double> %neg
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x float> @test_v4f32_fneg_fnmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) #0 {
|
2015-11-27 04:53:28 +08:00
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; FMA-LABEL: test_v4f32_fneg_fnmadd:
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; FMA: # BB#0:
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; FMA-NEXT: vfmsub213ps %xmm2, %xmm1, %xmm0
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v4f32_fneg_fnmadd:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmsubps %xmm2, %xmm1, %xmm0, %xmm0
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v4f32_fneg_fnmadd:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmsub213ps %xmm2, %xmm1, %xmm0
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; AVX512-NEXT: retq
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2015-11-25 04:31:46 +08:00
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%mul = fmul <4 x float> %a0, %a1
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%neg0 = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %mul
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%add = fadd <4 x float> %neg0, %a2
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%neg1 = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %add
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ret <4 x float> %neg1
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}
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define <4 x double> @test_v4f64_fneg_fnmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) #0 {
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2015-11-27 04:53:28 +08:00
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; FMA-LABEL: test_v4f64_fneg_fnmsub:
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; FMA: # BB#0:
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; FMA-NEXT: vfmadd213pd %ymm2, %ymm1, %ymm0
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v4f64_fneg_fnmsub:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmaddpd %ymm2, %ymm1, %ymm0, %ymm0
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v4f64_fneg_fnmsub:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmadd213pd %ymm2, %ymm1, %ymm0
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; AVX512-NEXT: retq
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2015-11-25 04:31:46 +08:00
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%mul = fmul <4 x double> %a0, %a1
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%neg0 = fsub <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %mul
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%sub = fsub <4 x double> %neg0, %a2
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%neg1 = fsub <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %sub
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ret <4 x double> %neg1
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}
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2015-11-28 22:28:44 +08:00
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;
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; Pattern: (fma x, c1, (fmul x, c2)) -> (fmul x, c1+c2)
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;
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2015-10-12 03:48:12 +08:00
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define <4 x float> @test_v4f32_fma_x_c1_fmul_x_c2(<4 x float> %x) #0 {
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2015-11-27 04:53:28 +08:00
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; FMA-LABEL: test_v4f32_fma_x_c1_fmul_x_c2:
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; FMA: # BB#0:
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; FMA-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v4f32_fma_x_c1_fmul_x_c2:
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; FMA4: # BB#0:
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; FMA4-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v4f32_fma_x_c1_fmul_x_c2:
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; AVX512: # BB#0:
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; AVX512-NEXT: vmulps {{.*}}(%rip){1to4}, %xmm0, %xmm0
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; AVX512-NEXT: retq
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2015-10-12 03:48:12 +08:00
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%m0 = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>
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%m1 = fmul <4 x float> %x, <float 4.0, float 3.0, float 2.0, float 1.0>
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%a = fadd <4 x float> %m0, %m1
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ret <4 x float> %a
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}
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2015-11-28 22:28:44 +08:00
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;
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; Pattern: (fma (fmul x, c1), c2, y) -> (fma x, c1*c2, y)
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;
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2015-10-12 03:48:12 +08:00
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define <4 x float> @test_v4f32_fma_fmul_x_c1_c2_y(<4 x float> %x, <4 x float> %y) #0 {
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2015-11-27 04:53:28 +08:00
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; FMA-LABEL: test_v4f32_fma_fmul_x_c1_c2_y:
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; FMA: # BB#0:
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; FMA-NEXT: vfmadd132ps {{.*}}(%rip), %xmm1, %xmm0
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v4f32_fma_fmul_x_c1_c2_y:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmaddps %xmm1, {{.*}}(%rip), %xmm0, %xmm0
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v4f32_fma_fmul_x_c1_c2_y:
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; AVX512: # BB#0:
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2016-07-23 15:16:56 +08:00
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; AVX512-NEXT: vfmadd132ps {{.*}}(%rip), %xmm1, %xmm0
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2015-11-27 04:53:28 +08:00
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; AVX512-NEXT: retq
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2015-10-12 03:48:12 +08:00
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%m0 = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>
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%m1 = fmul <4 x float> %m0, <float 4.0, float 3.0, float 2.0, float 1.0>
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%a = fadd <4 x float> %m1, %y
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ret <4 x float> %a
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}
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2015-12-02 17:07:55 +08:00
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; Pattern: (fneg (fmul x, y)) -> (fnmsub x, y, 0)
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define double @test_f64_fneg_fmul(double %x, double %y) #0 {
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; FMA-LABEL: test_f64_fneg_fmul:
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; FMA: # BB#0:
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2015-12-09 08:12:13 +08:00
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; FMA-NEXT: vxorpd %xmm2, %xmm2, %xmm2
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2015-12-02 17:07:55 +08:00
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; FMA-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_f64_fneg_fmul:
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; FMA4: # BB#0:
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2015-12-05 15:07:42 +08:00
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; FMA4-NEXT: vxorpd %xmm2, %xmm2, %xmm2
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2015-12-02 17:07:55 +08:00
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; FMA4-NEXT: vfnmsubsd %xmm2, %xmm1, %xmm0, %xmm0
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_f64_fneg_fmul:
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; AVX512: # BB#0:
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; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2
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2016-07-23 15:16:56 +08:00
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; AVX512-NEXT: vfnmsub213sd %xmm2, %xmm1, %xmm0
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2015-12-02 17:07:55 +08:00
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; AVX512-NEXT: retq
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%m = fmul nsz double %x, %y
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%n = fsub double -0.0, %m
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ret double %n
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}
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define <4 x float> @test_v4f32_fneg_fmul(<4 x float> %x, <4 x float> %y) #0 {
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; FMA-LABEL: test_v4f32_fneg_fmul:
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; FMA: # BB#0:
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; FMA-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; FMA-NEXT: vfnmsub213ps %xmm2, %xmm1, %xmm0
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v4f32_fneg_fmul:
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; FMA4: # BB#0:
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; FMA4-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; FMA4-NEXT: vfnmsubps %xmm2, %xmm1, %xmm0, %xmm0
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v4f32_fneg_fmul:
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; AVX512: # BB#0:
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2016-05-09 05:33:53 +08:00
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; AVX512-NEXT: vpxord %xmm2, %xmm2, %xmm2
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2015-12-02 17:07:55 +08:00
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; AVX512-NEXT: vfnmsub213ps %xmm2, %xmm1, %xmm0
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; AVX512-NEXT: retq
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%m = fmul nsz <4 x float> %x, %y
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%n = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %m
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ret <4 x float> %n
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}
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define <4 x double> @test_v4f64_fneg_fmul(<4 x double> %x, <4 x double> %y) #0 {
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; FMA-LABEL: test_v4f64_fneg_fmul:
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; FMA: # BB#0:
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; FMA-NEXT: vxorpd %ymm2, %ymm2, %ymm2
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; FMA-NEXT: vfnmsub213pd %ymm2, %ymm1, %ymm0
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v4f64_fneg_fmul:
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; FMA4: # BB#0:
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; FMA4-NEXT: vxorpd %ymm2, %ymm2, %ymm2
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; FMA4-NEXT: vfnmsubpd %ymm2, %ymm1, %ymm0, %ymm0
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v4f64_fneg_fmul:
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; AVX512: # BB#0:
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2016-05-09 05:33:53 +08:00
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; AVX512-NEXT: vpxord %ymm2, %ymm2, %ymm2
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2015-12-02 17:07:55 +08:00
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; AVX512-NEXT: vfnmsub213pd %ymm2, %ymm1, %ymm0
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; AVX512-NEXT: retq
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%m = fmul nsz <4 x double> %x, %y
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%n = fsub <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %m
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ret <4 x double> %n
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}
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define <4 x double> @test_v4f64_fneg_fmul_no_nsz(<4 x double> %x, <4 x double> %y) #0 {
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; ALL-LABEL: test_v4f64_fneg_fmul_no_nsz:
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; ALL: # BB#0:
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; ALL-NEXT: vmulpd %ymm1, %ymm0, %ymm0
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; ALL-NEXT: vxorpd {{.*}}(%rip), %ymm0, %ymm0
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; ALL-NEXT: retq
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%m = fmul <4 x double> %x, %y
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%n = fsub <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %m
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ret <4 x double> %n
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}
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2015-10-12 03:48:12 +08:00
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attributes #0 = { "unsafe-fp-math"="true" }
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