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llvm-project/llvm/test/CodeGen/X86/urem-seteq-optsize.ll

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[NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement. Hacker's Delight 10-17: when C is constant, the result of X % C == 0 can be computed more cheaply without actually calculating the remainder. The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479. Patch by: hermord (Dmytro Shynkevych)! For https://reviews.llvm.org/D50222 llvm-svn: 341047
2018-08-30 17:32:21 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform For https://reviews.llvm.org/D50222 Patch by: hermord (Dmytro Shynkevych)! llvm-svn: 341953
2018-09-11 23:34:26 +08:00
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
[NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement. Hacker's Delight 10-17: when C is constant, the result of X % C == 0 can be computed more cheaply without actually calculating the remainder. The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479. Patch by: hermord (Dmytro Shynkevych)! For https://reviews.llvm.org/D50222 llvm-svn: 341047
2018-08-30 17:32:21 +08:00
; On X86, division in expensive. BuildRemEqFold should therefore run even
; when optimizing for size. Only optimizing for minimum size retains a plain div.
define i32 @test_minsize(i32 %X) optsize minsize nounwind readnone {
; X86-LABEL: test_minsize:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: pushl $5
; X86-NEXT: popl %ecx
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: divl %ecx
; X86-NEXT: testl %edx, %edx
; X86-NEXT: je .LBB0_1
; X86-NEXT: # %bb.2:
; X86-NEXT: pushl $-10
; X86-NEXT: popl %eax
; X86-NEXT: retl
; X86-NEXT: .LBB0_1:
; X86-NEXT: pushl $42
; X86-NEXT: popl %eax
; X86-NEXT: retl
;
; X64-LABEL: test_minsize:
; X64: # %bb.0:
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
2018-09-20 02:59:08 +08:00
; X64-NEXT: movl %edi, %eax
[NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement. Hacker's Delight 10-17: when C is constant, the result of X % C == 0 can be computed more cheaply without actually calculating the remainder. The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479. Patch by: hermord (Dmytro Shynkevych)! For https://reviews.llvm.org/D50222 llvm-svn: 341047
2018-08-30 17:32:21 +08:00
; X64-NEXT: pushq $5
; X64-NEXT: popq %rcx
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: divl %ecx
; X64-NEXT: testl %edx, %edx
; X64-NEXT: pushq $42
; X64-NEXT: popq %rcx
; X64-NEXT: pushq $-10
; X64-NEXT: popq %rax
; X64-NEXT: cmovel %ecx, %eax
; X64-NEXT: retq
%rem = urem i32 %X, 5
%cmp = icmp eq i32 %rem, 0
%ret = select i1 %cmp, i32 42, i32 -10
ret i32 %ret
}
define i32 @test_optsize(i32 %X) optsize nounwind readnone {
; X86-LABEL: test_optsize:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $-858993459, %edx # imm = 0xCCCCCCCD
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: shrl $2, %edx
; X86-NEXT: leal (%edx,%edx,4), %eax
; X86-NEXT: cmpl %eax, %ecx
; X86-NEXT: movl $42, %eax
; X86-NEXT: je .LBB1_2
; X86-NEXT: # %bb.1:
; X86-NEXT: movl $-10, %eax
; X86-NEXT: .LBB1_2:
; X86-NEXT: retl
;
; X64-LABEL: test_optsize:
; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: movl $3435973837, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: shrq $34, %rcx
; X64-NEXT: leal (%rcx,%rcx,4), %eax
; X64-NEXT: cmpl %eax, %edi
; X64-NEXT: movl $42, %ecx
; X64-NEXT: movl $-10, %eax
; X64-NEXT: cmovel %ecx, %eax
; X64-NEXT: retq
%rem = urem i32 %X, 5
%cmp = icmp eq i32 %rem, 0
%ret = select i1 %cmp, i32 42, i32 -10
ret i32 %ret
}