forked from OSchip/llvm-project
61 lines
2.4 KiB
LLVM
61 lines
2.4 KiB
LLVM
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 | FileCheck %s
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; Check that store in memory with smaller lanes are loaded and stored
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; as expected. This is a regression test for part of bug 39275.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: load_ext_2xi32:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result v128{{$}}
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; CHECK-NEXT: i64.load32_u $push[[L0:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]{{$}}
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; CHECK-NEXT: i64.load32_u $push[[L2:[0-9]+]]=, 4($0){{$}}
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; CHECK-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L1]], 1, $pop[[L2]]{{$}}
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; CHECK-NEXT: return $pop[[R]]{{$}}
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define <2 x i32> @load_ext_2xi32(<2 x i32>* %p) {
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%1 = load <2 x i32>, <2 x i32>* %p, align 4
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ret <2 x i32> %1
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}
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; CHECK-LABEL: load_zext_2xi32:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result v128{{$}}
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; CHECK-NEXT: i64.load32_u $push[[L0:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]{{$}}
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; CHECK-NEXT: i64.load32_u $push[[L2:[0-9]+]]=, 4($0){{$}}
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; CHECK-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L1]], 1, $pop[[L2]]{{$}}
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; CHECK-NEXT: return $pop[[R]]{{$}}
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define <2 x i64> @load_zext_2xi32(<2 x i32>* %p) {
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%1 = load <2 x i32>, <2 x i32>* %p, align 4
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%2 = zext <2 x i32> %1 to <2 x i64>
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ret <2 x i64> %2
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}
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; CHECK-LABEL: load_sext_2xi32:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result v128{{$}}
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; CHECK-NEXT: i64.load32_s $push[[L0:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]{{$}}
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; CHECK-NEXT: i64.load32_s $push[[L2:[0-9]+]]=, 4($0){{$}}
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; CHECK-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L1]], 1, $pop[[L2]]{{$}}
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; CHECK-NEXT: return $pop[[R]]{{$}}
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define <2 x i64> @load_sext_2xi32(<2 x i32>* %p) {
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%1 = load <2 x i32>, <2 x i32>* %p, align 4
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%2 = sext <2 x i32> %1 to <2 x i64>
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ret <2 x i64> %2
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}
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; CHECK-LABEL: store_trunc_2xi32:
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; CHECK-NEXT: .param i32, v128{{$}}
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; CHECK-NEXT: i64x2.extract_lane $push[[L0:[0-9]+]]=, $1, 1
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; CHECK-NEXT: i64.store32 4($0), $pop[[L0]]
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; CHECK-NEXT: i64x2.extract_lane $push[[L1:[0-9]+]]=, $1, 0
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; CHECK-NEXT: i64.store32 0($0), $pop[[L1]]
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; CHECK-NEXT: return
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define void @store_trunc_2xi32(<2 x i32>* %p, <2 x i32> %x) {
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store <2 x i32> %x, <2 x i32>* %p, align 4
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ret void
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}
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