forked from OSchip/llvm-project
161 lines
4.8 KiB
LLVM
161 lines
4.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -verify-machineinstrs -enable-ppc-quad-precision < %s | FileCheck %s
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown \
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; RUN: -verify-machineinstrs -enable-ppc-quad-precision < %s | \
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; RUN: FileCheck %s -check-prefix=CHECK-BE
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@sdwVecMem = global <2 x i64> <i64 88, i64 99>, align 16
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@udwVecMem = global <2 x i64> <i64 88, i64 99>, align 16
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; Function Attrs: norecurse nounwind
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define void @sdwVecConv2qp(fp128* nocapture %a, <2 x i64> %b) {
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; CHECK-LABEL: sdwVecConv2qp:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltd 34, 34, 1
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; CHECK-NEXT: xscvsdqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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; CHECK-BE-LABEL: sdwVecConv2qp:
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; CHECK-BE: xscvsdqp 2, 2
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; CHECK-BE-NEXT: stxv 34, 0(3)
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; CHECK-BE-NEXT: blr
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entry:
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%vecext = extractelement <2 x i64> %b, i32 0
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%conv = sitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @sdwVecConv2qp1(fp128* nocapture %a, <2 x i64> %b) {
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; CHECK-LABEL: sdwVecConv2qp1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xscvsdqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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; CHECK-BE-LABEL: sdwVecConv2qp1:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxspltd 34, 34, 1
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; CHECK-BE-NEXT: xscvsdqp 2, 2
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; CHECK-BE-NEXT: stxv 34, 0(3)
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; CHECK-BE-NEXT: blr
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entry:
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%vecext = extractelement <2 x i64> %b, i32 1
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%conv = sitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @sdwVecConv2qp_02(fp128* nocapture %a) {
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; CHECK-LABEL: sdwVecConv2qp_02:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, .LC0@toc@ha
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; CHECK-NEXT: ld 4, .LC0@toc@l(4)
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; CHECK-NEXT: lxsd 2, 0(4)
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; CHECK-NEXT: xscvsdqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x i64>, <2 x i64>* @sdwVecMem, align 16
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%vecext = extractelement <2 x i64> %0, i32 0
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%conv = sitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @sdwVecConv2qp1_03(fp128* nocapture %a, <2 x i64>* nocapture readonly %b) {
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; CHECK-LABEL: sdwVecConv2qp1_03:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lxsd 2, 8(4)
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; CHECK-NEXT: xscvsdqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x i64>, <2 x i64>* %b, align 16
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%vecext = extractelement <2 x i64> %0, i32 1
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%conv = sitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @udwVecConv2qp(fp128* nocapture %a, <2 x i64> %b) {
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; CHECK-LABEL: udwVecConv2qp:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltd 34, 34, 1
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; CHECK-NEXT: xscvudqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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; CHECK-BE-LABEL: udwVecConv2qp:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xscvudqp 2, 2
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; CHECK-BE-NEXT: stxv 34, 0(3)
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; CHECK-BE-NEXT: blr
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entry:
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%vecext = extractelement <2 x i64> %b, i32 0
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%conv = uitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @udwVecConv2qp1(fp128* nocapture %a, <2 x i64> %b) {
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; CHECK-LABEL: udwVecConv2qp1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xscvudqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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; CHECK-BE-LABEL: udwVecConv2qp1:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxspltd 34, 34, 1
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; CHECK-BE-NEXT: xscvudqp 2, 2
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; CHECK-BE-NEXT: stxv 34, 0(3)
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; CHECK-BE-NEXT: blr
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entry:
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%vecext = extractelement <2 x i64> %b, i32 1
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%conv = uitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @udwVecConv2qp1_02(fp128* nocapture %a) {
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; CHECK-LABEL: udwVecConv2qp1_02:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
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; CHECK-NEXT: ld 4, .LC1@toc@l(4)
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; CHECK-NEXT: lxsd 2, 8(4)
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; CHECK-NEXT: xscvudqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x i64>, <2 x i64>* @udwVecMem, align 16
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%vecext = extractelement <2 x i64> %0, i32 1
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%conv = uitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @udwVecConv2qp_03(fp128* nocapture %a, <2 x i64>* nocapture readonly %b) {
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; CHECK-LABEL: udwVecConv2qp_03:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lxsd 2, 0(4)
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; CHECK-NEXT: xscvudqp 2, 2
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x i64>, <2 x i64>* %b, align 16
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%vecext = extractelement <2 x i64> %0, i32 0
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%conv = uitofp i64 %vecext to fp128
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store fp128 %conv, fp128* %a, align 16
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ret void
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}
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