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llvm-project/llvm/test/MC/AArch64/arm64-vector-lists.s

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[ARM64] Enable feature predicates for NEON / FP / CRYPTO. AArch64 has feature predicates for NEON, FP and CRYPTO instructions. This allows the compiler to generate code without using FP, NEON or CRYPTO instructions. llvm-svn: 206949
2014-04-23 14:22:48 +08:00
// RUN: not llvm-mc -triple arm64 -mattr=neon -show-encoding < %s 2>%t | FileCheck %s
[ARM64] Add parsing for vector lists such as {v0.8b-v3.8b} llvm-svn: 205862
2014-04-09 22:41:58 +08:00
// RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
ST4 {v0.8B-v3.8B}, [x0]
ST4 {v0.4H-v3.4H}, [x0]
// CHECK: st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0] // encoding: [0x00,0x00,0x00,0x0c]
// CHECK: st4 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0] // encoding: [0x00,0x04,0x00,0x0c]
ST4 {v0.8B-v4.8B}, [x0]
ST4 {v0.8B-v3.8B,v4.8B}, [x0]
ST4 {v0.8B-v3.8H}, [x0]
ST4 {v0.8B-v3.16B}, [x0]
ST4 {v0.8B-},[x0]
// CHECK-ERRORS: error: invalid number of vectors
AArch64/ARM64: make NEON vector list parsing a bit more robust It doesn't change the results, but it seems silly not to diagnose obvious problems early on. llvm-svn: 208083
2014-05-06 20:50:51 +08:00
// CHECK-ERRORS: error: '}' expected
[ARM64] Add parsing for vector lists such as {v0.8b-v3.8b} llvm-svn: 205862
2014-04-09 22:41:58 +08:00
// CHECK-ERRORS: error: mismatched register size suffix
// CHECK-ERRORS: error: mismatched register size suffix
// CHECK-ERRORS: error: vector register expected