forked from OSchip/llvm-project
27 lines
1.1 KiB
ArmAsm
27 lines
1.1 KiB
ArmAsm
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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facle p0.h, p0/z, z0.h, z1.h
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// CHECK-INST: facge p0.h, p0/z, z1.h, z0.h
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// CHECK-ENCODING: [0x30,0xc0,0x40,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 30 c0 40 65 <unknown>
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facle p0.s, p0/z, z0.s, z1.s
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// CHECK-INST: facge p0.s, p0/z, z1.s, z0.s
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// CHECK-ENCODING: [0x30,0xc0,0x80,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 30 c0 80 65 <unknown>
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facle p0.d, p0/z, z0.d, z1.d
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// CHECK-INST: facge p0.d, p0/z, z1.d, z0.d
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// CHECK-ENCODING: [0x30,0xc0,0xc0,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 30 c0 c0 65 <unknown>
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