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llvm-project/lld/test/ELF/relocation-b-aarch64.test

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[ELF] Always write non-immediate bits for AArch64 branch instruction. To support errata patching on AArch64 we need to be able to overwrite an arbitrary instruction with a branch. For AArch64 it is sufficient to always write all the bits of the branch instruction and not just the immediate field. This is safe as the non-immediate bits of the branch instruction are always the same. Differential Revision: https://reviews.llvm.org/D36745 llvm-svn: 312727
2017-09-08 00:29:52 +08:00
# REQUIRES: aarch64
# RUN: yaml2obj %s -o %t.o
# RUN: ld.lld %t.o -o %t.out
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
# RUN: llvm-objdump -d --no-show-raw-insn %t.out | FileCheck %s
[ELF] Always write non-immediate bits for AArch64 branch instruction. To support errata patching on AArch64 we need to be able to overwrite an arbitrary instruction with a branch. For AArch64 it is sufficient to always write all the bits of the branch instruction and not just the immediate field. This is safe as the non-immediate bits of the branch instruction are always the same. Differential Revision: https://reviews.llvm.org/D36745 llvm-svn: 312727
2017-09-08 00:29:52 +08:00
# Check that the R_AARCH64_JUMP26 writes the branch opcode as well as the
# immediate. We use this property to overwrite instructions with a branch.
# CHECK: Disassembly of section .text:
[llvm-objdump] Print newlines before and after "Disassembly of section ...:" This improves readability and the behavior is consistent with GNU objdump. The new test test/tools/llvm-objdump/X86/disassemble-section-name.s checks we print newlines before and after "Disassembly of section ...:" Differential Revision: https://reviews.llvm.org/D61127 llvm-svn: 359668
2019-05-01 18:40:48 +08:00
# CHECK-EMPTY:
[llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` The new behavior matches GNU objdump. A pair of angle brackets makes tests slightly easier. `.foo:` is not unique and thus cannot be used in a `CHECK-LABEL:` directive. Without `-LABEL`, the CHECK line can match the `Disassembly of section` line and causes the next `CHECK-NEXT:` to fail. ``` Disassembly of section .foo: 0000000000001634 .foo: ``` Bdragon: <> has metalinguistic connotation. it just "feels right" Reviewed By: rupprecht Differential Revision: https://reviews.llvm.org/D75713
2020-03-06 06:18:38 +08:00
# CHECK-NEXT: <foo>:
[AArch64InstPrinter] Change printAlignedLabel to print the target address in hexadecimal form Similar to D76580 (x86) and D76591 (PPC). ``` // llvm-objdump -d output (before) 10000: 08 00 00 94 bl #32 10004: 08 00 00 94 bl #32 // llvm-objdump -d output (after) 10000: 08 00 00 94 bl 0x10020 10004: 08 00 00 94 bl 0x10024 // GNU objdump -d. The lack of 0x is not ideal due to ambiguity. 10000: 94000008 bl 10020 <bar+0x18> 10004: 94000008 bl 10024 <bar+0x1c> ``` The new output makes it easier to find the jump target. Differential Revision: https://reviews.llvm.org/D77853
2020-04-10 09:46:35 +08:00
# CHECK-NEXT: 210120: b 0x210124
[llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` The new behavior matches GNU objdump. A pair of angle brackets makes tests slightly easier. `.foo:` is not unique and thus cannot be used in a `CHECK-LABEL:` directive. Without `-LABEL`, the CHECK line can match the `Disassembly of section` line and causes the next `CHECK-NEXT:` to fail. ``` Disassembly of section .foo: 0000000000001634 .foo: ``` Bdragon: <> has metalinguistic connotation. it just "feels right" Reviewed By: rupprecht Differential Revision: https://reviews.llvm.org/D75713
2020-03-06 06:18:38 +08:00
# CHECK: <bar>:
[AArch64InstPrinter] Change printAlignedLabel to print the target address in hexadecimal form Similar to D76580 (x86) and D76591 (PPC). ``` // llvm-objdump -d output (before) 10000: 08 00 00 94 bl #32 10004: 08 00 00 94 bl #32 // llvm-objdump -d output (after) 10000: 08 00 00 94 bl 0x10020 10004: 08 00 00 94 bl 0x10024 // GNU objdump -d. The lack of 0x is not ideal due to ambiguity. 10000: 94000008 bl 10020 <bar+0x18> 10004: 94000008 bl 10024 <bar+0x1c> ``` The new output makes it easier to find the jump target. Differential Revision: https://reviews.llvm.org/D77853
2020-04-10 09:46:35 +08:00
# CHECK-NEXT: 210124: b 0x210120
[ELF] Always write non-immediate bits for AArch64 branch instruction. To support errata patching on AArch64 we need to be able to overwrite an arbitrary instruction with a branch. For AArch64 it is sufficient to always write all the bits of the branch instruction and not just the immediate field. This is safe as the non-immediate bits of the branch instruction are always the same. Differential Revision: https://reviews.llvm.org/D36745 llvm-svn: 312727
2017-09-08 00:29:52 +08:00
!ELF
FileHeader:
Class: ELFCLASS64
Data: ELFDATA2LSB
Type: ET_REL
Machine: EM_AARCH64
Sections:
- Type: SHT_PROGBITS
Name: .text
Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
Content: "0000000000000000"
- Type: SHT_RELA
Name: .rela.text
Link: .symtab
Info: .text
Relocations:
[lib/ObjectYAML] - Make `ELFYAML::Relocation::Offset` optional. Currently `yaml2obj` require `Offset` field in a relocation description. There are many cases when `Offset` is insignificant in a context of a test case. Making `Offset` optional allows to simplify our test cases. This is what this patch does. Also, with this patch `obj2yaml` does not dump a zero offset of a relocation. Differential revision: https://reviews.llvm.org/D75608
2020-03-04 21:55:15 +08:00
- Symbol: bar
[ELF] Always write non-immediate bits for AArch64 branch instruction. To support errata patching on AArch64 we need to be able to overwrite an arbitrary instruction with a branch. For AArch64 it is sufficient to always write all the bits of the branch instruction and not just the immediate field. This is safe as the non-immediate bits of the branch instruction are always the same. Differential Revision: https://reviews.llvm.org/D36745 llvm-svn: 312727
2017-09-08 00:29:52 +08:00
Type: R_AARCH64_JUMP26
- Offset: 4
Symbol: foo
Type: R_AARCH64_JUMP26
Symbols:
[LLD] - Update the test cases after yaml2obj change. https://reviews.llvm.org/D60122 (r357595) changed the symbols description format. This change updates the LLD tests. llvm-svn: 357596
2019-04-03 22:54:22 +08:00
- Type: STT_FUNC
Section: .text
Name: foo
Value: 0
- Type: STT_FUNC
Section: .text
Name: bar
Value: 4