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llvm-project/llvm/test/CodeGen/SystemZ/args-07.ll

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[SystemZ] Support large LLVM IR struct return values Recent mesa/llvmpipe crashes on SystemZ due to a failed assertion when attempting to compile a routine with a return type of { <4 x float>, <4 x float>, <4 x float>, <4 x float> } on a system without vector instruction support. This is because after legalizing the vector type, we get a return value consisting of 16 floats, which cannot all be returned in registers. Usually, what should happen in this case is that the target's CanLowerReturn routine rejects the return type, in which case SelectionDAG falls back to implementing a structure return in memory via implicit reference. However, the SystemZ target never actually implemented any CanLowerReturn routine, and thus would accept any struct return type. This patch fixes the crash by implementing CanLowerReturn. As a side effect, this also handles fp128 return values, fixing a todo that was noted in SystemZCallingConv.td. llvm-svn: 244889
2015-08-13 21:37:06 +08:00
; Test multiple return values (LLVM ABI extension)
;
[SelectionDAGBuilder] Make sure DemoteReg ends up in right reg-class. The virtual register containing the address for returned value on stack should in the DAG be represented with a CopyFromReg node and not a Register node. Otherwise, InstrEmitter will not make sure that it ends up in the right register class for the target instruction. SystemZ needs this, becuause the reg class for address registers is a subset of the general 64 bit register class. test/SystemZ/CodeGen/args-07.ll and args-04.ll updated to run with -verify-machineinstrs. Reviewed by Hal Finkel. llvm-svn: 253461
2015-11-18 22:59:00 +08:00
; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs| FileCheck %s
[SystemZ] Support large LLVM IR struct return values Recent mesa/llvmpipe crashes on SystemZ due to a failed assertion when attempting to compile a routine with a return type of { <4 x float>, <4 x float>, <4 x float>, <4 x float> } on a system without vector instruction support. This is because after legalizing the vector type, we get a return value consisting of 16 floats, which cannot all be returned in registers. Usually, what should happen in this case is that the target's CanLowerReturn routine rejects the return type, in which case SelectionDAG falls back to implementing a structure return in memory via implicit reference. However, the SystemZ target never actually implemented any CanLowerReturn routine, and thus would accept any struct return type. This patch fixes the crash by implementing CanLowerReturn. As a side effect, this also handles fp128 return values, fixing a todo that was noted in SystemZCallingConv.td. llvm-svn: 244889
2015-08-13 21:37:06 +08:00
; Up to four integer return values fit into GPRs.
define { i64, i64, i64, i64 } @f1() {
; CHECK-LABEL: f1:
; CHECK: lghi %r2, 0
; CHECK: lghi %r3, 1
; CHECK: lghi %r4, 2
; CHECK: lghi %r5, 3
; CHECK: br %r14
ret { i64, i64, i64, i64 } { i64 0, i64 1, i64 2, i64 3 }
}
; More than four integer return values use sret.
define { i64, i64, i64, i64, i64 } @f2() {
; CHECK-LABEL: f2:
; CHECK: mvghi 32(%r2), 4
; CHECK: mvghi 24(%r2), 3
; CHECK: mvghi 16(%r2), 2
; CHECK: mvghi 8(%r2), 1
; CHECK: mvghi 0(%r2), 0
; CHECK: br %r14
ret { i64, i64, i64, i64, i64 } { i64 0, i64 1, i64 2, i64 3, i64 4 }
}
; Up to four floating-point return values fit into FPRs.
define { double, double, double, double } @f3() {
; CHECK-LABEL: f3:
; CHECK: larl [[TMP:%r[0-5]]], .LCPI
; CHECK: ldeb %f0, 0([[TMP]])
; CHECK: larl [[TMP:%r[0-5]]], .LCPI
; CHECK: ldeb %f2, 0([[TMP]])
; CHECK: larl [[TMP:%r[0-5]]], .LCPI
; CHECK: ldeb %f4, 0([[TMP]])
; CHECK: larl [[TMP:%r[0-5]]], .LCPI
; CHECK: ldeb %f6, 0([[TMP]])
; CHECK: br %r14
ret { double, double, double, double }
{ double 1.0, double 2.0, double 3.0, double 4.0 }
}
; More than four floating-point return values use sret.
define { double, double, double, double, double } @f4() {
; CHECK-LABEL: f4:
; CHECK: llihh [[TMP:%r[0-5]]], 16404
; CHECK: stg [[TMP]], 32(%r2)
; CHECK: llihh [[TMP:%r[0-5]]], 16400
; CHECK: stg [[TMP]], 24(%r2)
; CHECK: llihh [[TMP:%r[0-5]]], 16392
; CHECK: stg [[TMP]], 16(%r2)
; CHECK: llihh [[TMP:%r[0-5]]], 16384
; CHECK: stg [[TMP]], 8(%r2)
; CHECK: llihh [[TMP:%r[0-5]]], 16368
; CHECK: stg [[TMP]], 0(%r2)
; CHECK: br %r14
ret { double, double, double, double, double }
{ double 1.0, double 2.0, double 3.0, double 4.0, double 5.0 }
}