2012-02-19 10:03:36 +08:00
|
|
|
//===-- X86Subtarget.h - Define Subtarget for the X86 ----------*- C++ -*--===//
|
2005-07-12 09:41:54 +08:00
|
|
|
//
|
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
2007-12-30 04:36:04 +08:00
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
2005-07-12 09:41:54 +08:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//
|
2011-07-02 05:01:15 +08:00
|
|
|
// This file declares the X86 specific subclass of TargetSubtargetInfo.
|
2005-07-12 09:41:54 +08:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
|
|
|
#ifndef X86SUBTARGET_H
|
|
|
|
#define X86SUBTARGET_H
|
|
|
|
|
2010-07-06 03:26:33 +08:00
|
|
|
#include "llvm/ADT/Triple.h"
|
2011-07-02 05:01:15 +08:00
|
|
|
#include "llvm/Target/TargetSubtargetInfo.h"
|
2010-05-28 02:43:40 +08:00
|
|
|
#include "llvm/CallingConv.h"
|
2005-09-02 05:38:21 +08:00
|
|
|
#include <string>
|
|
|
|
|
2011-07-02 04:45:01 +08:00
|
|
|
#define GET_SUBTARGETINFO_HEADER
|
2011-07-02 06:36:09 +08:00
|
|
|
#include "X86GenSubtargetInfo.inc"
|
2011-07-02 04:45:01 +08:00
|
|
|
|
2005-07-12 09:41:54 +08:00
|
|
|
namespace llvm {
|
2006-12-01 06:42:55 +08:00
|
|
|
class GlobalValue;
|
2011-07-07 15:07:08 +08:00
|
|
|
class StringRef;
|
2006-12-23 06:29:05 +08:00
|
|
|
class TargetMachine;
|
2010-03-01 06:54:30 +08:00
|
|
|
|
2009-07-09 11:15:51 +08:00
|
|
|
/// PICStyles - The X86 backend supports a number of different styles of PIC.
|
2010-03-01 06:54:30 +08:00
|
|
|
///
|
2008-11-28 17:29:37 +08:00
|
|
|
namespace PICStyles {
|
2007-01-13 03:20:47 +08:00
|
|
|
enum Style {
|
2009-07-11 04:58:47 +08:00
|
|
|
StubPIC, // Used on i386-darwin in -fPIC mode.
|
|
|
|
StubDynamicNoPIC, // Used on i386-darwin in -mdynamic-no-pic mode.
|
|
|
|
GOT, // Used on many 32-bit unices in -fPIC mode.
|
|
|
|
RIPRel, // Used on X86-64 when not in -static mode.
|
|
|
|
None // Set when in -static mode (not PIC or DynamicNoPIC mode).
|
2007-01-13 03:20:47 +08:00
|
|
|
};
|
|
|
|
}
|
2005-07-12 09:41:54 +08:00
|
|
|
|
2011-07-02 04:45:01 +08:00
|
|
|
class X86Subtarget : public X86GenSubtargetInfo {
|
2005-07-12 09:41:54 +08:00
|
|
|
protected:
|
2006-01-27 16:10:46 +08:00
|
|
|
enum X86SSEEnum {
|
2012-01-09 17:02:13 +08:00
|
|
|
NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
|
2006-01-27 16:10:46 +08:00
|
|
|
};
|
|
|
|
|
2006-10-06 17:17:41 +08:00
|
|
|
enum X863DNowEnum {
|
|
|
|
NoThreeDNow, ThreeDNow, ThreeDNowA
|
|
|
|
};
|
|
|
|
|
2012-02-02 07:20:51 +08:00
|
|
|
enum X86ProcFamilyEnum {
|
|
|
|
Others, IntelAtom
|
|
|
|
};
|
|
|
|
|
|
|
|
/// X86ProcFamily - X86 processor family: Intel Atom, and others
|
|
|
|
X86ProcFamilyEnum X86ProcFamily;
|
|
|
|
|
2007-01-13 03:20:47 +08:00
|
|
|
/// PICStyle - Which PIC style to use
|
2007-08-02 07:45:51 +08:00
|
|
|
///
|
2008-11-28 17:29:37 +08:00
|
|
|
PICStyles::Style PICStyle;
|
2010-03-01 06:54:30 +08:00
|
|
|
|
2008-02-12 15:59:55 +08:00
|
|
|
/// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
|
|
|
|
/// none supported.
|
2006-01-27 16:10:46 +08:00
|
|
|
X86SSEEnum X86SSELevel;
|
|
|
|
|
2006-10-06 17:17:41 +08:00
|
|
|
/// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
|
2007-08-02 07:45:51 +08:00
|
|
|
///
|
2006-10-06 17:17:41 +08:00
|
|
|
X863DNowEnum X863DNowLevel;
|
|
|
|
|
2009-09-02 13:53:04 +08:00
|
|
|
/// HasCMov - True if this processor has conditional move instructions
|
|
|
|
/// (generally pentium pro+).
|
|
|
|
bool HasCMov;
|
2010-03-01 06:54:30 +08:00
|
|
|
|
2006-09-08 14:48:29 +08:00
|
|
|
/// HasX86_64 - True if the processor supports X86-64 instructions.
|
2007-08-02 07:45:51 +08:00
|
|
|
///
|
2006-09-08 14:48:29 +08:00
|
|
|
bool HasX86_64;
|
2009-01-02 13:35:45 +08:00
|
|
|
|
2010-12-05 04:32:23 +08:00
|
|
|
/// HasPOPCNT - True if the processor supports POPCNT.
|
|
|
|
bool HasPOPCNT;
|
|
|
|
|
2009-05-27 05:04:35 +08:00
|
|
|
/// HasSSE4A - True if the processor supports SSE4A instructions.
|
|
|
|
bool HasSSE4A;
|
|
|
|
|
2010-04-03 05:54:27 +08:00
|
|
|
/// HasAES - Target has AES instructions
|
|
|
|
bool HasAES;
|
|
|
|
|
2010-07-23 09:17:51 +08:00
|
|
|
/// HasCLMUL - Target has carry-less multiplication
|
|
|
|
bool HasCLMUL;
|
|
|
|
|
2009-06-27 06:46:54 +08:00
|
|
|
/// HasFMA3 - Target has 3-operand fused multiply-add
|
|
|
|
bool HasFMA3;
|
|
|
|
|
|
|
|
/// HasFMA4 - Target has 4-operand fused multiply-add
|
|
|
|
bool HasFMA4;
|
|
|
|
|
2011-12-02 23:14:37 +08:00
|
|
|
/// HasXOP - Target has XOP instructions
|
|
|
|
bool HasXOP;
|
|
|
|
|
2011-10-09 15:31:39 +08:00
|
|
|
/// HasMOVBE - True if the processor has the MOVBE instruction.
|
2011-10-04 01:28:23 +08:00
|
|
|
bool HasMOVBE;
|
|
|
|
|
2011-10-09 15:31:39 +08:00
|
|
|
/// HasRDRAND - True if the processor has the RDRAND instruction.
|
2011-10-04 01:28:23 +08:00
|
|
|
bool HasRDRAND;
|
|
|
|
|
2011-10-09 15:31:39 +08:00
|
|
|
/// HasF16C - Processor has 16-bit floating point conversion instructions.
|
|
|
|
bool HasF16C;
|
|
|
|
|
2011-10-31 03:57:21 +08:00
|
|
|
/// HasFSGSBase - Processor has FS/GS base insturctions.
|
|
|
|
bool HasFSGSBase;
|
|
|
|
|
2011-10-11 14:44:02 +08:00
|
|
|
/// HasLZCNT - Processor has LZCNT instruction.
|
|
|
|
bool HasLZCNT;
|
|
|
|
|
2011-10-14 11:21:46 +08:00
|
|
|
/// HasBMI - Processor has BMI1 instructions.
|
|
|
|
bool HasBMI;
|
|
|
|
|
2011-10-16 15:55:05 +08:00
|
|
|
/// HasBMI2 - Processor has BMI2 instructions.
|
|
|
|
bool HasBMI2;
|
|
|
|
|
2009-06-27 06:46:54 +08:00
|
|
|
/// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
|
|
|
|
bool IsBTMemSlow;
|
2009-12-18 15:40:29 +08:00
|
|
|
|
2010-04-01 13:58:17 +08:00
|
|
|
/// IsUAMemFast - True if unaligned memory access is fast.
|
|
|
|
bool IsUAMemFast;
|
|
|
|
|
2010-03-01 06:54:30 +08:00
|
|
|
/// HasVectorUAMem - True if SIMD operations can have unaligned memory
|
2010-04-21 09:47:12 +08:00
|
|
|
/// operands. This may require setting a feature bit in the processor.
|
2010-01-12 00:29:42 +08:00
|
|
|
bool HasVectorUAMem;
|
|
|
|
|
2011-08-27 05:21:21 +08:00
|
|
|
/// HasCmpxchg16b - True if this processor has the CMPXCHG16B instruction;
|
|
|
|
/// this is true for most x86-64 chips, but not the first AMD chips.
|
|
|
|
bool HasCmpxchg16b;
|
|
|
|
|
2012-02-08 06:50:41 +08:00
|
|
|
/// UseLeaForSP - True if the LEA instruction should be used for adjusting
|
|
|
|
/// the stack pointer. This is an optimization for Intel Atom processors.
|
|
|
|
bool UseLeaForSP;
|
|
|
|
|
2012-02-02 07:20:51 +08:00
|
|
|
/// PostRAScheduler - True if using post-register-allocation scheduler.
|
|
|
|
bool PostRAScheduler;
|
|
|
|
|
2005-07-12 10:36:10 +08:00
|
|
|
/// stackAlignment - The minimum alignment known to hold of the stack frame on
|
|
|
|
/// entry to the function and which must be maintained by every function.
|
2005-07-12 09:41:54 +08:00
|
|
|
unsigned stackAlignment;
|
2005-07-27 13:53:44 +08:00
|
|
|
|
2007-10-31 19:52:06 +08:00
|
|
|
/// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
|
2007-08-02 07:45:51 +08:00
|
|
|
///
|
2007-10-31 19:52:06 +08:00
|
|
|
unsigned MaxInlineSizeThreshold;
|
2011-02-17 20:23:50 +08:00
|
|
|
|
2010-07-06 03:26:33 +08:00
|
|
|
/// TargetTriple - What processor and OS we're targeting.
|
|
|
|
Triple TargetTriple;
|
2012-02-02 07:20:51 +08:00
|
|
|
|
|
|
|
/// Instruction itineraries for scheduling
|
|
|
|
InstrItineraryData InstrItins;
|
2006-02-16 08:21:07 +08:00
|
|
|
|
2006-09-08 14:48:29 +08:00
|
|
|
private:
|
2011-07-08 05:06:52 +08:00
|
|
|
/// In64BitMode - True if compiling for 64-bit, false for 32-bit.
|
|
|
|
bool In64BitMode;
|
2006-09-08 14:48:29 +08:00
|
|
|
|
2005-07-12 09:41:54 +08:00
|
|
|
public:
|
2006-11-21 08:01:06 +08:00
|
|
|
|
2005-07-27 13:53:44 +08:00
|
|
|
/// This constructor initializes the data members to match that
|
2009-08-03 06:11:08 +08:00
|
|
|
/// of the specified triple.
|
2005-07-12 09:41:54 +08:00
|
|
|
///
|
2011-06-30 09:53:36 +08:00
|
|
|
X86Subtarget(const std::string &TT, const std::string &CPU,
|
2011-07-08 05:06:52 +08:00
|
|
|
const std::string &FS,
|
2011-07-09 06:30:25 +08:00
|
|
|
unsigned StackAlignOverride, bool is64Bit);
|
2005-07-12 10:36:10 +08:00
|
|
|
|
|
|
|
/// getStackAlignment - Returns the minimum alignment known to hold of the
|
|
|
|
/// stack frame on entry to the function and which must be maintained by every
|
|
|
|
/// function for this subtarget.
|
2005-07-12 09:41:54 +08:00
|
|
|
unsigned getStackAlignment() const { return stackAlignment; }
|
2005-07-27 13:53:44 +08:00
|
|
|
|
2007-10-31 19:52:06 +08:00
|
|
|
/// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
|
|
|
|
/// that still makes it profitable to inline the call.
|
|
|
|
unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; }
|
2006-11-21 08:01:06 +08:00
|
|
|
|
|
|
|
/// ParseSubtargetFeatures - Parses features string setting specified
|
2006-10-06 17:17:41 +08:00
|
|
|
/// subtarget options. Definition of function is auto generated by tblgen.
|
2011-07-07 15:07:08 +08:00
|
|
|
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
2006-10-06 17:17:41 +08:00
|
|
|
|
|
|
|
/// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
|
|
|
|
/// instruction.
|
|
|
|
void AutoDetectSubtargetFeatures();
|
2006-01-26 17:53:06 +08:00
|
|
|
|
2011-07-08 05:06:52 +08:00
|
|
|
bool is64Bit() const { return In64BitMode; }
|
2006-01-26 17:53:06 +08:00
|
|
|
|
2008-11-28 17:29:37 +08:00
|
|
|
PICStyles::Style getPICStyle() const { return PICStyle; }
|
|
|
|
void setPICStyle(PICStyles::Style Style) { PICStyle = Style; }
|
2007-01-13 03:20:47 +08:00
|
|
|
|
2010-03-15 02:31:44 +08:00
|
|
|
bool hasCMov() const { return HasCMov; }
|
2006-01-27 16:10:46 +08:00
|
|
|
bool hasMMX() const { return X86SSELevel >= MMX; }
|
2012-01-10 14:30:56 +08:00
|
|
|
bool hasSSE1() const { return X86SSELevel >= SSE1; }
|
|
|
|
bool hasSSE2() const { return X86SSELevel >= SSE2; }
|
|
|
|
bool hasSSE3() const { return X86SSELevel >= SSE3; }
|
|
|
|
bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
|
|
|
|
bool hasSSE41() const { return X86SSELevel >= SSE41; }
|
|
|
|
bool hasSSE42() const { return X86SSELevel >= SSE42; }
|
2012-01-10 14:54:16 +08:00
|
|
|
bool hasAVX() const { return X86SSELevel >= AVX; }
|
|
|
|
bool hasAVX2() const { return X86SSELevel >= AVX2; }
|
2009-05-27 05:04:35 +08:00
|
|
|
bool hasSSE4A() const { return HasSSE4A; }
|
2006-10-06 17:17:41 +08:00
|
|
|
bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
|
|
|
|
bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
|
2010-12-05 04:32:23 +08:00
|
|
|
bool hasPOPCNT() const { return HasPOPCNT; }
|
2010-04-03 05:54:27 +08:00
|
|
|
bool hasAES() const { return HasAES; }
|
2010-07-23 09:17:51 +08:00
|
|
|
bool hasCLMUL() const { return HasCLMUL; }
|
2009-06-27 06:46:54 +08:00
|
|
|
bool hasFMA3() const { return HasFMA3; }
|
|
|
|
bool hasFMA4() const { return HasFMA4; }
|
2011-12-02 23:14:37 +08:00
|
|
|
bool hasXOP() const { return HasXOP; }
|
2011-10-04 01:28:23 +08:00
|
|
|
bool hasMOVBE() const { return HasMOVBE; }
|
|
|
|
bool hasRDRAND() const { return HasRDRAND; }
|
2011-10-09 15:31:39 +08:00
|
|
|
bool hasF16C() const { return HasF16C; }
|
2011-10-31 03:57:21 +08:00
|
|
|
bool hasFSGSBase() const { return HasFSGSBase; }
|
2011-10-11 14:44:02 +08:00
|
|
|
bool hasLZCNT() const { return HasLZCNT; }
|
2011-10-14 11:21:46 +08:00
|
|
|
bool hasBMI() const { return HasBMI; }
|
2011-10-16 15:55:05 +08:00
|
|
|
bool hasBMI2() const { return HasBMI2; }
|
2009-01-02 13:35:45 +08:00
|
|
|
bool isBTMemSlow() const { return IsBTMemSlow; }
|
2010-04-01 13:58:17 +08:00
|
|
|
bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
|
2010-01-12 00:29:42 +08:00
|
|
|
bool hasVectorUAMem() const { return HasVectorUAMem; }
|
2011-08-27 05:21:21 +08:00
|
|
|
bool hasCmpxchg16b() const { return HasCmpxchg16b; }
|
2012-02-08 06:50:41 +08:00
|
|
|
bool useLeaForSP() const { return UseLeaForSP; }
|
2009-01-02 13:35:45 +08:00
|
|
|
|
2012-02-02 07:20:51 +08:00
|
|
|
bool isAtom() const { return X86ProcFamily == IntelAtom; }
|
|
|
|
|
2011-04-20 05:01:47 +08:00
|
|
|
const Triple &getTargetTriple() const { return TargetTriple; }
|
|
|
|
|
2011-04-20 05:14:45 +08:00
|
|
|
bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
|
|
|
|
bool isTargetFreeBSD() const {
|
|
|
|
return TargetTriple.getOS() == Triple::FreeBSD;
|
|
|
|
}
|
|
|
|
bool isTargetSolaris() const {
|
|
|
|
return TargetTriple.getOS() == Triple::Solaris;
|
|
|
|
}
|
2011-02-17 20:23:50 +08:00
|
|
|
|
2010-07-06 03:26:33 +08:00
|
|
|
// ELF is a reasonably sane default and the only other X86 targets we
|
|
|
|
// support are Darwin and Windows. Just use "not those".
|
2012-02-05 16:26:40 +08:00
|
|
|
bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
|
2010-07-06 03:26:33 +08:00
|
|
|
bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; }
|
2011-09-06 05:51:43 +08:00
|
|
|
bool isTargetNaCl() const {
|
|
|
|
return TargetTriple.getOS() == Triple::NativeClient;
|
|
|
|
}
|
|
|
|
bool isTargetNaCl32() const { return isTargetNaCl() && !is64Bit(); }
|
|
|
|
bool isTargetNaCl64() const { return isTargetNaCl() && is64Bit(); }
|
2010-07-06 03:26:33 +08:00
|
|
|
bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; }
|
2011-02-17 20:24:17 +08:00
|
|
|
bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; }
|
2010-07-06 03:26:33 +08:00
|
|
|
bool isTargetCygwin() const { return TargetTriple.getOS() == Triple::Cygwin; }
|
2012-02-05 16:26:40 +08:00
|
|
|
bool isTargetCygMing() const { return TargetTriple.isOSCygMing(); }
|
|
|
|
bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }
|
|
|
|
bool isTargetEnvMacho() const { return TargetTriple.isEnvironmentMachO(); }
|
2010-03-01 06:54:30 +08:00
|
|
|
|
2008-03-23 04:57:27 +08:00
|
|
|
bool isTargetWin64() const {
|
2011-07-20 12:02:20 +08:00
|
|
|
// FIXME: x86_64-cygwin has not been released yet.
|
2012-02-05 16:26:40 +08:00
|
|
|
return In64BitMode && TargetTriple.isOSWindows();
|
2011-02-01 09:14:13 +08:00
|
|
|
}
|
|
|
|
|
2010-09-03 07:03:46 +08:00
|
|
|
bool isTargetWin32() const {
|
2012-02-05 16:26:40 +08:00
|
|
|
// FIXME: Cygwin is included for isTargetWin64 -- should it be included
|
|
|
|
// here too?
|
2011-07-08 05:06:52 +08:00
|
|
|
return !In64BitMode && (isTargetMingw() || isTargetWindows());
|
2010-09-03 07:03:46 +08:00
|
|
|
}
|
|
|
|
|
2008-11-28 17:29:37 +08:00
|
|
|
bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
|
|
|
|
bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
|
|
|
|
bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
|
2009-07-11 04:47:30 +08:00
|
|
|
|
2009-07-11 05:00:45 +08:00
|
|
|
bool isPICStyleStubPIC() const {
|
2009-07-11 04:58:47 +08:00
|
|
|
return PICStyle == PICStyles::StubPIC;
|
|
|
|
}
|
|
|
|
|
2009-07-11 05:00:45 +08:00
|
|
|
bool isPICStyleStubNoDynamic() const {
|
2009-07-11 04:58:47 +08:00
|
|
|
return PICStyle == PICStyles::StubDynamicNoPIC;
|
|
|
|
}
|
|
|
|
bool isPICStyleStubAny() const {
|
|
|
|
return PICStyle == PICStyles::StubDynamicNoPIC ||
|
|
|
|
PICStyle == PICStyles::StubPIC; }
|
2010-03-01 06:54:30 +08:00
|
|
|
|
2009-07-10 15:20:05 +08:00
|
|
|
/// ClassifyGlobalReference - Classify a global variable reference for the
|
|
|
|
/// current subtarget according to how we should reference it in a non-pcrel
|
|
|
|
/// context.
|
|
|
|
unsigned char ClassifyGlobalReference(const GlobalValue *GV,
|
|
|
|
const TargetMachine &TM)const;
|
2006-12-20 09:03:20 +08:00
|
|
|
|
2009-11-21 07:18:13 +08:00
|
|
|
/// ClassifyBlockAddressReference - Classify a blockaddress reference for the
|
|
|
|
/// current subtarget according to how we should reference it in a non-pcrel
|
|
|
|
/// context.
|
|
|
|
unsigned char ClassifyBlockAddressReference() const;
|
|
|
|
|
2009-05-20 12:53:57 +08:00
|
|
|
/// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
|
|
|
|
/// to immediate address.
|
|
|
|
bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
|
|
|
|
|
2008-04-02 04:38:36 +08:00
|
|
|
/// This function returns the name of a function which has an interface
|
|
|
|
/// like the non-standard bzero function, if such a function exists on
|
|
|
|
/// the current subtarget and it is considered prefereable over
|
|
|
|
/// memset with zero passed as the second argument. Otherwise it
|
|
|
|
/// returns null.
|
2008-10-01 06:05:33 +08:00
|
|
|
const char *getBZeroEntry() const;
|
2008-12-16 11:35:01 +08:00
|
|
|
|
|
|
|
/// getSpecialAddressLatency - For targets where it is beneficial to
|
|
|
|
/// backschedule instructions that compute addresses, return a value
|
|
|
|
/// indicating the number of scheduling cycles of backscheduling that
|
|
|
|
/// should be attempted.
|
|
|
|
unsigned getSpecialAddressLatency() const;
|
2012-02-02 07:20:51 +08:00
|
|
|
|
|
|
|
/// enablePostRAScheduler - run for Atom optimization.
|
|
|
|
bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
|
|
|
|
TargetSubtargetInfo::AntiDepBreakMode& Mode,
|
|
|
|
RegClassVector& CriticalPathRCs) const;
|
|
|
|
|
|
|
|
/// getInstrItins = Return the instruction itineraries based on the
|
|
|
|
/// subtarget selection.
|
|
|
|
const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
|
2009-09-03 12:37:05 +08:00
|
|
|
};
|
2006-10-17 05:00:37 +08:00
|
|
|
|
2005-07-12 09:41:54 +08:00
|
|
|
} // End llvm namespace
|
|
|
|
|
|
|
|
#endif
|