forked from OSchip/llvm-project
55 lines
1.9 KiB
LLVM
55 lines
1.9 KiB
LLVM
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; RUN: llc -march=hexagon -enable-pipeliner -stats -o /dev/null < %s 2>&1 | FileCheck %s --check-prefix=STATS
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; REQUIRES: asserts
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; STATS: 1 pipeliner - Number of loops software pipelined
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; Function Attrs: nounwind
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define void @f0(i32 %a0) #0 {
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b0:
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%v0 = icmp slt i32 %a0, 123469
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br i1 %v0, label %b1, label %b4
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v1 = phi i64 [ undef, %b1 ], [ %v12, %b2 ]
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%v2 = phi i64 [ undef, %b1 ], [ %v10, %b2 ]
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%v3 = phi i32 [ 0, %b1 ], [ %v13, %b2 ]
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%v4 = phi i32 [ undef, %b1 ], [ %v9, %b2 ]
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%v5 = phi i64 [ undef, %b1 ], [ %v7, %b2 ]
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%v6 = phi i64 [ undef, %b1 ], [ %v11, %b2 ]
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%v7 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v5, i64 %v6, i64 %v6)
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%v8 = tail call i64 @llvm.hexagon.S2.packhl(i32 undef, i32 %v4)
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%v9 = load i32, i32* undef, align 4, !tbaa !0
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%v10 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v2, i64 %v6, i64 %v8)
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%v11 = tail call i64 @llvm.hexagon.S2.packhl(i32 %v9, i32 undef)
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%v12 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v1, i64 %v6, i64 %v11)
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%v13 = add nsw i32 %v3, 1
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%v14 = icmp eq i32 %v13, undef
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br i1 %v14, label %b3, label %b2
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b3: ; preds = %b2
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%v15 = lshr i64 %v12, 32
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br label %b4
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b4: ; preds = %b3, %b0
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%v16 = phi i64 [ %v10, %b3 ], [ undef, %b0 ]
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%v17 = phi i64 [ %v7, %b3 ], [ undef, %b0 ]
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unreachable
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #1
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.S2.packhl(i32, i32) #1
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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attributes #1 = { nounwind readnone }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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