forked from OSchip/llvm-project
153 lines
4.6 KiB
LLVM
153 lines
4.6 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; https://bugs.llvm.org/show_bug.cgi?id=38708
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; Pattern:
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; (1 << bits) u> val
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; Should be transformed into:
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; (val l>> bits) == 0
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; ============================================================================ ;
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; Basic positive tests
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; ============================================================================ ;
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define i1 @p0(i8 %val, i8 %bits) {
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; CHECK-LABEL: @p0(
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; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL:%.*]], [[BITS:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[VAL_HIGHBITS]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = shl i8 1, %bits
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%r = icmp ugt i8 %t0, %val
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ret i1 %r
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}
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; ============================================================================ ;
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; Vector tests
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; ============================================================================ ;
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define <2 x i1> @p1_vec(<2 x i8> %val, <2 x i8> %bits) {
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; CHECK-LABEL: @p1_vec(
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; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <2 x i8> [[VAL:%.*]], [[BITS:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[VAL_HIGHBITS]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[R]]
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;
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%t0 = shl <2 x i8> <i8 1, i8 1>, %bits
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%r = icmp ugt <2 x i8> %t0, %val
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ret <2 x i1> %r
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}
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define <3 x i1> @p2_vec_undef(<3 x i8> %val, <3 x i8> %bits) {
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; CHECK-LABEL: @p2_vec_undef(
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; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq <3 x i8> [[VAL_HIGHBITS]], zeroinitializer
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; CHECK-NEXT: ret <3 x i1> [[R]]
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;
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%t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits
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%r = icmp ugt <3 x i8> %t0, %val
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ret <3 x i1> %r
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}
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; ============================================================================ ;
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; Commutativity tests.
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; ============================================================================ ;
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declare i8 @gen8()
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define i1 @c0(i8 %bits) {
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; CHECK-LABEL: @c0(
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; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()
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; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL]], [[BITS:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[VAL_HIGHBITS]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = shl i8 1, %bits
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%val = call i8 @gen8()
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%r = icmp ult i8 %val, %t0 ; swapped order and predicate
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ret i1 %r
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}
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; What if we have the same pattern on both sides?
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define i1 @both(i8 %bits0, i8 %bits1) {
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; CHECK-LABEL: @both(
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; CHECK-NEXT: [[T1:%.*]] = shl i8 1, [[BITS1:%.*]]
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; CHECK-NEXT: [[T1_HIGHBITS:%.*]] = lshr i8 [[T1]], [[BITS0:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[T1_HIGHBITS]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = shl i8 1, %bits0
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%t1 = shl i8 1, %bits1
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%r = icmp ugt i8 %t0, %t1
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ret i1 %r
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}
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; ============================================================================ ;
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; One-use tests.
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; ============================================================================ ;
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declare void @use8(i8)
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define i1 @oneuse0(i8 %val, i8 %bits) {
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; CHECK-LABEL: @oneuse0(
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; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
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; CHECK-NEXT: call void @use8(i8 [[T0]])
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; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[VAL:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = shl i8 1, %bits
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call void @use8(i8 %t0)
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%r = icmp ugt i8 %t0, %val
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ret i1 %r
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}
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; ============================================================================ ;
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; Negative tests
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; ============================================================================ ;
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define i1 @n0(i8 %val, i8 %bits) {
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; CHECK-LABEL: @n0(
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; CHECK-NEXT: [[T0:%.*]] = shl i8 2, [[BITS:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[VAL:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = shl i8 2, %bits ; constant is not 1
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%r = icmp ugt i8 %t0, %val
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ret i1 %r
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}
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define <2 x i1> @n1_vec_nonsplat(<2 x i8> %val, <2 x i8> %bits) {
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; CHECK-LABEL: @n1_vec_nonsplat(
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; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 2>, [[BITS:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[T0]], [[VAL:%.*]]
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; CHECK-NEXT: ret <2 x i1> [[R]]
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;
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%t0 = shl <2 x i8> <i8 1, i8 2>, %bits ; again, wrong constant
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%r = icmp ugt <2 x i8> %t0, %val
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ret <2 x i1> %r
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}
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define i1 @n2(i8 %val, i8 %bits) {
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; CHECK-LABEL: @n2(
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; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T0]], [[VAL:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = shl i8 1, %bits
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%r = icmp uge i8 %t0, %val ; wrong predicate
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ret i1 %r
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}
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define i1 @n3(i8 %bits) {
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; CHECK-LABEL: @n3(
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; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
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; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()
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; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[VAL]], [[T0]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = shl i8 1, %bits
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%val = call i8 @gen8()
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%r = icmp ule i8 %val, %t0 ; swapped order and [wrong] predicate
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ret i1 %r
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}
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