forked from OSchip/llvm-project
68 lines
1.5 KiB
LLVM
68 lines
1.5 KiB
LLVM
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; RUN: llc -o - %s -mtriple=aarch64-none-linux-gnu -mattr=+force-32bit-jump-tables -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
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; RUN: llc -o - %s -mtriple=aarch64-none-linux-gnu -mcpu=exynos-m1 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
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; RUN: llc -o - %s -mtriple=aarch64-none-linux-gnu -mcpu=exynos-m2 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
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; RUN: llc -o - %s -mtriple=aarch64-none-linux-gnu -mcpu=exynos-m3 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
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; Exynos doesn't want jump tables to be compressed for now.
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define i32 @test_jumptable(i32 %in) {
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switch i32 %in, label %def [
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i32 0, label %lbl1
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i32 1, label %lbl2
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i32 2, label %lbl3
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i32 4, label %lbl4
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]
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; CHECK-LABEL: test_jumptable:
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; CHECK-NOT: ldrb
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def:
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ret i32 0
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lbl1:
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ret i32 1
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lbl2:
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ret i32 2
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lbl3:
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ret i32 4
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lbl4:
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ret i32 8
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}
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define i32 @test_jumptable_minsize(i32 %in) minsize {
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switch i32 %in, label %def [
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i32 0, label %lbl1
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i32 1, label %lbl2
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i32 2, label %lbl3
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i32 4, label %lbl4
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]
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; CHECK-LABEL: test_jumptable_minsize:
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; CHECK: adrp [[JTPAGE:x[0-9]+]], .LJTI1_0
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; CHECK: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI1_0
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; CHECK: adr [[PCBASE:x[0-9]+]], [[JTBASE:.LBB[0-9]+_[0-9]+]]
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; CHECK: ldrb w[[OFFSET:[0-9]+]], [x[[JT]], {{x[0-9]+}}]
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; CHECK: add [[DEST:x[0-9]+]], [[PCBASE]], x[[OFFSET]], lsl #2
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; CHECK: br [[DEST]]
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def:
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ret i32 0
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lbl1:
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ret i32 1
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lbl2:
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ret i32 2
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lbl3:
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ret i32 4
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lbl4:
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ret i32 8
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}
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