2019-04-17 12:52:47 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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2019-09-16 22:05:19 +08:00
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declare void @use(i32)
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2019-04-17 12:52:47 +08:00
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; PR1949
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define i1 @test1(i32 %a) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[A:%.*]], -5
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add i32 %a, 4
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%c = icmp ult i32 %b, 4
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ret i1 %c
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}
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define <2 x i1> @test1vec(<2 x i32> %a) {
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; CHECK-LABEL: @test1vec(
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; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i32> [[A:%.*]], <i32 -5, i32 -5>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = add <2 x i32> %a, <i32 4, i32 4>
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%c = icmp ult <2 x i32> %b, <i32 4, i32 4>
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ret <2 x i1> %c
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}
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define i1 @test2(i32 %a) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A:%.*]], 4
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = sub i32 %a, 4
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%c = icmp ugt i32 %b, -5
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ret i1 %c
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}
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define <2 x i1> @test2vec(<2 x i32> %a) {
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; CHECK-LABEL: @test2vec(
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; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i32> [[A:%.*]], <i32 4, i32 4>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = sub <2 x i32> %a, <i32 4, i32 4>
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%c = icmp ugt <2 x i32> %b, <i32 -5, i32 -5>
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ret <2 x i1> %c
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}
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define i1 @test3(i32 %a) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A:%.*]], 2147483643
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add i32 %a, 4
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%c = icmp slt i32 %b, 2147483652
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ret i1 %c
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}
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define <2 x i1> @test3vec(<2 x i32> %a) {
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; CHECK-LABEL: @test3vec(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[A:%.*]], <i32 2147483643, i32 2147483643>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = add <2 x i32> %a, <i32 4, i32 4>
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%c = icmp slt <2 x i32> %b, <i32 2147483652, i32 2147483652>
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ret <2 x i1> %c
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}
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define i1 @test4(i32 %a) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A:%.*]], -4
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add i32 %a, 2147483652
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%c = icmp sge i32 %b, 4
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ret i1 %c
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}
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define { i32, i1 } @test4multiuse(i32 %a) {
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; CHECK-LABEL: @test4multiuse(
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; CHECK-NEXT: [[B:%.*]] = add i32 [[A:%.*]], -2147483644
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[B]], -4
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; CHECK-NEXT: [[TMP:%.*]] = insertvalue { i32, i1 } undef, i32 [[B]], 0
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; CHECK-NEXT: [[RES:%.*]] = insertvalue { i32, i1 } [[TMP]], i1 [[C]], 1
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; CHECK-NEXT: ret { i32, i1 } [[RES]]
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;
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%b = add i32 %a, -2147483644
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%c = icmp slt i32 %b, -4
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%tmp = insertvalue { i32, i1 } undef, i32 %b, 0
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%res = insertvalue { i32, i1 } %tmp, i1 %c, 1
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ret { i32, i1 } %res
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}
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define <2 x i1> @test4vec(<2 x i32> %a) {
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; CHECK-LABEL: @test4vec(
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; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> [[A:%.*]], <i32 -4, i32 -4>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = add <2 x i32> %a, <i32 2147483652, i32 2147483652>
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%c = icmp sge <2 x i32> %b, <i32 4, i32 4>
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ret <2 x i1> %c
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}
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; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.
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; This becomes equality because it's at the limit.
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define i1 @nsw_slt1(i8 %a) {
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; CHECK-LABEL: @nsw_slt1(
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; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], -128
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add nsw i8 %a, 100
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%c = icmp slt i8 %b, -27
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ret i1 %c
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}
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define <2 x i1> @nsw_slt1_splat_vec(<2 x i8> %a) {
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; CHECK-LABEL: @nsw_slt1_splat_vec(
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; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[A:%.*]], <i8 -128, i8 -128>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = add nsw <2 x i8> %a, <i8 100, i8 100>
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%c = icmp slt <2 x i8> %b, <i8 -27, i8 -27>
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ret <2 x i1> %c
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}
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; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.
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; This becomes equality because it's at the limit.
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define i1 @nsw_slt2(i8 %a) {
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; CHECK-LABEL: @nsw_slt2(
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; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[A:%.*]], 127
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add nsw i8 %a, -100
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%c = icmp slt i8 %b, 27
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ret i1 %c
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}
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define <2 x i1> @nsw_slt2_splat_vec(<2 x i8> %a) {
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; CHECK-LABEL: @nsw_slt2_splat_vec(
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; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[A:%.*]], <i8 127, i8 127>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = add nsw <2 x i8> %a, <i8 -100, i8 -100>
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%c = icmp slt <2 x i8> %b, <i8 27, i8 27>
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ret <2 x i1> %c
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}
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; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.
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; Less than the limit, so the predicate doesn't change.
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define i1 @nsw_slt3(i8 %a) {
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; CHECK-LABEL: @nsw_slt3(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[A:%.*]], -126
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add nsw i8 %a, 100
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%c = icmp slt i8 %b, -26
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ret i1 %c
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}
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; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.
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; Less than the limit, so the predicate doesn't change.
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define i1 @nsw_slt4(i8 %a) {
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; CHECK-LABEL: @nsw_slt4(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[A:%.*]], 126
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add nsw i8 %a, -100
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%c = icmp slt i8 %b, 26
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ret i1 %c
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}
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; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.
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; Try sgt to make sure that works too.
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define i1 @nsw_sgt1(i8 %a) {
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; CHECK-LABEL: @nsw_sgt1(
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; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], 127
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add nsw i8 %a, -100
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%c = icmp sgt i8 %b, 26
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ret i1 %c
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}
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define <2 x i1> @nsw_sgt1_splat_vec(<2 x i8> %a) {
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; CHECK-LABEL: @nsw_sgt1_splat_vec(
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; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[A:%.*]], <i8 127, i8 127>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = add nsw <2 x i8> %a, <i8 -100, i8 -100>
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%c = icmp sgt <2 x i8> %b, <i8 26, i8 26>
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ret <2 x i1> %c
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}
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define i1 @nsw_sgt2(i8 %a) {
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; CHECK-LABEL: @nsw_sgt2(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[A:%.*]], -126
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; CHECK-NEXT: ret i1 [[C]]
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;
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%b = add nsw i8 %a, 100
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%c = icmp sgt i8 %b, -26
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ret i1 %c
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}
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define <2 x i1> @nsw_sgt2_splat_vec(<2 x i8> %a) {
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; CHECK-LABEL: @nsw_sgt2_splat_vec(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i8> [[A:%.*]], <i8 -126, i8 -126>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%b = add nsw <2 x i8> %a, <i8 100, i8 100>
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%c = icmp sgt <2 x i8> %b, <i8 -26, i8 -26>
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ret <2 x i1> %c
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}
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; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.
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; Comparison with 0 doesn't need special-casing.
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define i1 @slt_zero_add_nsw(i32 %a) {
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; CHECK-LABEL: @slt_zero_add_nsw(
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A:%.*]], -1
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%add = add nsw i32 %a, 1
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%cmp = icmp slt i32 %add, 0
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ret i1 %cmp
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}
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; The same fold should work with vectors.
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define <2 x i1> @slt_zero_add_nsw_splat_vec(<2 x i8> %a) {
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; CHECK-LABEL: @slt_zero_add_nsw_splat_vec(
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], <i8 -1, i8 -1>
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%add = add nsw <2 x i8> %a, <i8 1, i8 1>
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%cmp = icmp slt <2 x i8> %add, zeroinitializer
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ret <2 x i1> %cmp
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}
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; Test the edges - instcombine should not interfere with simplification to constants.
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; Constant subtraction does not overflow, but this is false.
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define i1 @nsw_slt3_ov_no(i8 %a) {
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; CHECK-LABEL: @nsw_slt3_ov_no(
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; CHECK-NEXT: ret i1 false
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;
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%b = add nsw i8 %a, 100
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%c = icmp slt i8 %b, -28
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ret i1 %c
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}
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; Test the edges - instcombine should not interfere with simplification to constants.
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; Constant subtraction overflows. This is false.
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define i1 @nsw_slt4_ov(i8 %a) {
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; CHECK-LABEL: @nsw_slt4_ov(
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; CHECK-NEXT: ret i1 false
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;
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%b = add nsw i8 %a, 100
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%c = icmp slt i8 %b, -29
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ret i1 %c
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}
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; Test the edges - instcombine should not interfere with simplification to constants.
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; Constant subtraction overflows. This is true.
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define i1 @nsw_slt5_ov(i8 %a) {
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; CHECK-LABEL: @nsw_slt5_ov(
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; CHECK-NEXT: ret i1 true
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;
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%b = add nsw i8 %a, -100
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%c = icmp slt i8 %b, 28
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ret i1 %c
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}
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; InstCombine should not thwart this opportunity to simplify completely.
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define i1 @slt_zero_add_nsw_signbit(i8 %x) {
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; CHECK-LABEL: @slt_zero_add_nsw_signbit(
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; CHECK-NEXT: ret i1 true
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;
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%y = add nsw i8 %x, -128
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%z = icmp slt i8 %y, 0
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ret i1 %z
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}
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; InstCombine should not thwart this opportunity to simplify completely.
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define i1 @slt_zero_add_nuw_signbit(i8 %x) {
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; CHECK-LABEL: @slt_zero_add_nuw_signbit(
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; CHECK-NEXT: ret i1 true
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;
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%y = add nuw i8 %x, 128
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%z = icmp slt i8 %y, 0
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ret i1 %z
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}
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define i1 @reduce_add_ult(i32 %in) {
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; CHECK-LABEL: @reduce_add_ult(
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; CHECK-NEXT: [[A18:%.*]] = icmp ult i32 [[IN:%.*]], 9
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; CHECK-NEXT: ret i1 [[A18]]
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;
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%a6 = add nuw i32 %in, 3
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%a18 = icmp ult i32 %a6, 12
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ret i1 %a18
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}
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define i1 @reduce_add_ugt(i32 %in) {
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; CHECK-LABEL: @reduce_add_ugt(
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; CHECK-NEXT: [[A18:%.*]] = icmp ugt i32 [[IN:%.*]], 9
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; CHECK-NEXT: ret i1 [[A18]]
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;
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%a6 = add nuw i32 %in, 3
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%a18 = icmp ugt i32 %a6, 12
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ret i1 %a18
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|
|
|
}
|
|
|
|
|
|
|
|
define i1 @reduce_add_ule(i32 %in) {
|
|
|
|
; CHECK-LABEL: @reduce_add_ule(
|
|
|
|
; CHECK-NEXT: [[A18:%.*]] = icmp ult i32 [[IN:%.*]], 10
|
|
|
|
; CHECK-NEXT: ret i1 [[A18]]
|
|
|
|
;
|
|
|
|
%a6 = add nuw i32 %in, 3
|
|
|
|
%a18 = icmp ule i32 %a6, 12
|
|
|
|
ret i1 %a18
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @reduce_add_uge(i32 %in) {
|
|
|
|
; CHECK-LABEL: @reduce_add_uge(
|
|
|
|
; CHECK-NEXT: [[A18:%.*]] = icmp ugt i32 [[IN:%.*]], 8
|
|
|
|
; CHECK-NEXT: ret i1 [[A18]]
|
|
|
|
;
|
|
|
|
%a6 = add nuw i32 %in, 3
|
|
|
|
%a18 = icmp uge i32 %a6, 12
|
|
|
|
ret i1 %a18
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @ult_add_ssubov(i32 %in) {
|
|
|
|
; CHECK-LABEL: @ult_add_ssubov(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%a6 = add nuw i32 %in, 71
|
|
|
|
%a18 = icmp ult i32 %a6, 3
|
|
|
|
ret i1 %a18
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @ult_add_nonuw(i8 %in) {
|
|
|
|
; CHECK-LABEL: @ult_add_nonuw(
|
|
|
|
; CHECK-NEXT: [[A6:%.*]] = add i8 [[IN:%.*]], 71
|
|
|
|
; CHECK-NEXT: [[A18:%.*]] = icmp ult i8 [[A6]], 12
|
|
|
|
; CHECK-NEXT: ret i1 [[A18]]
|
|
|
|
;
|
|
|
|
%a6 = add i8 %in, 71
|
|
|
|
%a18 = icmp ult i8 %a6, 12
|
|
|
|
ret i1 %a18
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @uge_add_nonuw(i32 %in) {
|
|
|
|
; CHECK-LABEL: @uge_add_nonuw(
|
|
|
|
; CHECK-NEXT: [[A6:%.*]] = add i32 [[IN:%.*]], 3
|
|
|
|
; CHECK-NEXT: [[A18:%.*]] = icmp ugt i32 [[A6]], 11
|
|
|
|
; CHECK-NEXT: ret i1 [[A18]]
|
|
|
|
;
|
|
|
|
%a6 = add i32 %in, 3
|
|
|
|
%a18 = icmp uge i32 %a6, 12
|
|
|
|
ret i1 %a18
|
|
|
|
}
|
|
|
|
|
|
|
|
; Test unsigned add overflow patterns. The div ops are only here to
|
|
|
|
; thwart complexity based canonicalization of the operand order.
|
|
|
|
|
|
|
|
define i1 @op_ugt_sum_commute1(i8 %p1, i8 %p2) {
|
|
|
|
; CHECK-LABEL: @op_ugt_sum_commute1(
|
|
|
|
; CHECK-NEXT: [[X:%.*]] = sdiv i8 42, [[P1:%.*]]
|
|
|
|
; CHECK-NEXT: [[Y:%.*]] = sdiv i8 42, [[P2:%.*]]
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], -1
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[Y]], [[TMP1]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%x = sdiv i8 42, %p1
|
|
|
|
%y = sdiv i8 42, %p2
|
|
|
|
%a = add i8 %x, %y
|
|
|
|
%c = icmp ugt i8 %x, %a
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define <2 x i1> @op_ugt_sum_vec_commute2(<2 x i8> %p1, <2 x i8> %p2) {
|
|
|
|
; CHECK-LABEL: @op_ugt_sum_vec_commute2(
|
|
|
|
; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 -42>, [[P1:%.*]]
|
|
|
|
; CHECK-NEXT: [[Y:%.*]] = sdiv <2 x i8> <i8 42, i8 -42>, [[P2:%.*]]
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X]], <i8 -1, i8 -1>
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i8> [[Y]], [[TMP1]]
|
|
|
|
; CHECK-NEXT: ret <2 x i1> [[C]]
|
|
|
|
;
|
|
|
|
%x = sdiv <2 x i8> <i8 42, i8 -42>, %p1
|
|
|
|
%y = sdiv <2 x i8> <i8 42, i8 -42>, %p2
|
|
|
|
%a = add <2 x i8> %y, %x
|
|
|
|
%c = icmp ugt <2 x i8> %x, %a
|
|
|
|
ret <2 x i1> %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @sum_ugt_op_uses(i8 %p1, i8 %p2, i8* %p3) {
|
|
|
|
; CHECK-LABEL: @sum_ugt_op_uses(
|
|
|
|
; CHECK-NEXT: [[X:%.*]] = sdiv i8 42, [[P1:%.*]]
|
|
|
|
; CHECK-NEXT: [[Y:%.*]] = sdiv i8 42, [[P2:%.*]]
|
|
|
|
; CHECK-NEXT: [[A:%.*]] = add nsw i8 [[X]], [[Y]]
|
|
|
|
; CHECK-NEXT: store i8 [[A]], i8* [[P3:%.*]], align 1
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[X]], [[A]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%x = sdiv i8 42, %p1
|
|
|
|
%y = sdiv i8 42, %p2
|
|
|
|
%a = add i8 %x, %y
|
|
|
|
store i8 %a, i8* %p3
|
|
|
|
%c = icmp ugt i8 %x, %a
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define <2 x i1> @sum_ult_op_vec_commute1(<2 x i8> %p1, <2 x i8> %p2) {
|
|
|
|
; CHECK-LABEL: @sum_ult_op_vec_commute1(
|
|
|
|
; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 -42>, [[P1:%.*]]
|
|
|
|
; CHECK-NEXT: [[Y:%.*]] = sdiv <2 x i8> <i8 -42, i8 42>, [[P2:%.*]]
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X]], <i8 -1, i8 -1>
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i8> [[Y]], [[TMP1]]
|
|
|
|
; CHECK-NEXT: ret <2 x i1> [[C]]
|
|
|
|
;
|
|
|
|
%x = sdiv <2 x i8> <i8 42, i8 -42>, %p1
|
|
|
|
%y = sdiv <2 x i8> <i8 -42, i8 42>, %p2
|
|
|
|
%a = add <2 x i8> %x, %y
|
|
|
|
%c = icmp ult <2 x i8> %a, %x
|
|
|
|
ret <2 x i1> %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @sum_ult_op_commute2(i8 %p1, i8 %p2) {
|
|
|
|
; CHECK-LABEL: @sum_ult_op_commute2(
|
|
|
|
; CHECK-NEXT: [[X:%.*]] = sdiv i8 42, [[P1:%.*]]
|
|
|
|
; CHECK-NEXT: [[Y:%.*]] = sdiv i8 42, [[P2:%.*]]
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], -1
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[Y]], [[TMP1]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%x = sdiv i8 42, %p1
|
|
|
|
%y = sdiv i8 42, %p2
|
|
|
|
%a = add i8 %y, %x
|
|
|
|
%c = icmp ult i8 %a, %x
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @sum_ult_op_uses(i8 %x, i8 %y, i8* %p) {
|
|
|
|
; CHECK-LABEL: @sum_ult_op_uses(
|
|
|
|
; CHECK-NEXT: [[A:%.*]] = add i8 [[Y:%.*]], [[X:%.*]]
|
|
|
|
; CHECK-NEXT: store i8 [[A]], i8* [[P:%.*]], align 1
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[A]], [[X]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%a = add i8 %y, %x
|
|
|
|
store i8 %a, i8* %p
|
|
|
|
%c = icmp ult i8 %a, %x
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
2019-09-16 22:05:19 +08:00
|
|
|
; X + Z >s Y + Z -> X > Y if there is no overflow.
|
|
|
|
define i1 @common_op_nsw(i32 %x, i32 %y, i32 %z) {
|
|
|
|
; CHECK-LABEL: @common_op_nsw(
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nsw i32 %x, %z
|
|
|
|
%rhs = add nsw i32 %y, %z
|
|
|
|
%c = icmp sgt i32 %lhs, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @common_op_nsw_extra_uses(i32 %x, i32 %y, i32 %z) {
|
|
|
|
; CHECK-LABEL: @common_op_nsw_extra_uses(
|
|
|
|
; CHECK-NEXT: [[LHS:%.*]] = add nsw i32 [[X:%.*]], [[Z:%.*]]
|
|
|
|
; CHECK-NEXT: call void @use(i32 [[LHS]])
|
|
|
|
; CHECK-NEXT: [[RHS:%.*]] = add nsw i32 [[Y:%.*]], [[Z]]
|
|
|
|
; CHECK-NEXT: call void @use(i32 [[RHS]])
|
2019-09-17 00:15:25 +08:00
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X]], [[Y]]
|
2019-09-16 22:05:19 +08:00
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nsw i32 %x, %z
|
|
|
|
call void @use(i32 %lhs)
|
|
|
|
%rhs = add nsw i32 %y, %z
|
|
|
|
call void @use(i32 %rhs)
|
|
|
|
%c = icmp sgt i32 %lhs, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
; X + Z >u Z + Y -> X > Y if there is no overflow.
|
|
|
|
define i1 @common_op_nuw(i32 %x, i32 %y, i32 %z) {
|
|
|
|
; CHECK-LABEL: @common_op_nuw(
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nuw i32 %x, %z
|
|
|
|
%rhs = add nuw i32 %z, %y
|
|
|
|
%c = icmp ugt i32 %lhs, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @common_op_nuw_extra_uses(i32 %x, i32 %y, i32 %z) {
|
|
|
|
; CHECK-LABEL: @common_op_nuw_extra_uses(
|
|
|
|
; CHECK-NEXT: [[LHS:%.*]] = add nuw i32 [[X:%.*]], [[Z:%.*]]
|
|
|
|
; CHECK-NEXT: call void @use(i32 [[LHS]])
|
|
|
|
; CHECK-NEXT: [[RHS:%.*]] = add nuw i32 [[Z]], [[Y:%.*]]
|
|
|
|
; CHECK-NEXT: call void @use(i32 [[RHS]])
|
2019-09-17 00:15:25 +08:00
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], [[Y]]
|
2019-09-16 22:05:19 +08:00
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nuw i32 %x, %z
|
|
|
|
call void @use(i32 %lhs)
|
|
|
|
%rhs = add nuw i32 %z, %y
|
|
|
|
call void @use(i32 %rhs)
|
|
|
|
%c = icmp ugt i32 %lhs, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @common_op_nsw_commute(i32 %x, i32 %y, i32 %z) {
|
|
|
|
; CHECK-LABEL: @common_op_nsw_commute(
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nsw i32 %z, %x
|
|
|
|
%rhs = add nsw i32 %y, %z
|
|
|
|
%c = icmp slt i32 %lhs, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @common_op_nuw_commute(i32 %x, i32 %y, i32 %z) {
|
|
|
|
; CHECK-LABEL: @common_op_nuw_commute(
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nuw i32 %z, %x
|
|
|
|
%rhs = add nuw i32 %z, %y
|
|
|
|
%c = icmp ult i32 %lhs, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
; X + Y > X -> Y > 0 if there is no overflow.
|
|
|
|
define i1 @common_op_test29(i32 %x, i32 %y) {
|
|
|
|
; CHECK-LABEL: @common_op_test29(
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Y:%.*]], 0
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nsw i32 %x, %y
|
|
|
|
%c = icmp sgt i32 %lhs, %x
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
; X + Y > X -> Y > 0 if there is no overflow.
|
|
|
|
define i1 @sum_nuw(i32 %x, i32 %y) {
|
|
|
|
; CHECK-LABEL: @sum_nuw(
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[Y:%.*]], 0
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%lhs = add nuw i32 %x, %y
|
|
|
|
%c = icmp ugt i32 %lhs, %x
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
; X > X + Y -> 0 > Y if there is no overflow.
|
|
|
|
define i1 @sum_nsw_commute(i32 %x, i32 %y) {
|
|
|
|
; CHECK-LABEL: @sum_nsw_commute(
|
|
|
|
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[Y:%.*]], 0
|
|
|
|
; CHECK-NEXT: ret i1 [[C]]
|
|
|
|
;
|
|
|
|
%rhs = add nsw i32 %x, %y
|
|
|
|
%c = icmp sgt i32 %x, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
; X > X + Y -> 0 > Y if there is no overflow.
|
|
|
|
define i1 @sum_nuw_commute(i32 %x, i32 %y) {
|
|
|
|
; CHECK-LABEL: @sum_nuw_commute(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%rhs = add nuw i32 %x, %y
|
|
|
|
%c = icmp ugt i32 %x, %rhs
|
|
|
|
ret i1 %c
|
|
|
|
}
|
2019-09-16 23:33:40 +08:00
|
|
|
|
|
|
|
; PR2698 - https://bugs.llvm.org/show_bug.cgi?id=2698
|
|
|
|
|
|
|
|
declare void @use1(i1)
|
|
|
|
declare void @use8(i8)
|
|
|
|
|
|
|
|
define void @bzip1(i8 %a, i8 %b, i8 %x) {
|
|
|
|
; CHECK-LABEL: @bzip1(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], [[B:%.*]]
|
|
|
|
; CHECK-NEXT: call void @use1(i1 [[CMP]])
|
|
|
|
; CHECK-NEXT: ret void
|
|
|
|
;
|
|
|
|
%add1 = add i8 %a, %x
|
|
|
|
%add2 = add i8 %b, %x
|
|
|
|
%cmp = icmp eq i8 %add1, %add2
|
|
|
|
call void @use1(i1 %cmp)
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
define void @bzip2(i8 %a, i8 %b, i8 %x) {
|
|
|
|
; CHECK-LABEL: @bzip2(
|
|
|
|
; CHECK-NEXT: [[ADD1:%.*]] = add i8 [[A:%.*]], [[X:%.*]]
|
2019-09-17 00:15:25 +08:00
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], [[B:%.*]]
|
2019-09-16 23:33:40 +08:00
|
|
|
; CHECK-NEXT: call void @use1(i1 [[CMP]])
|
|
|
|
; CHECK-NEXT: call void @use8(i8 [[ADD1]])
|
|
|
|
; CHECK-NEXT: ret void
|
|
|
|
;
|
|
|
|
%add1 = add i8 %a, %x
|
|
|
|
%add2 = add i8 %b, %x
|
|
|
|
%cmp = icmp eq i8 %add1, %add2
|
|
|
|
call void @use1(i1 %cmp)
|
|
|
|
call void @use8(i8 %add1)
|
|
|
|
ret void
|
|
|
|
}
|