2019-04-17 12:52:47 +08:00
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|
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i1 @PR1817_1(i32 %X) {
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; CHECK-LABEL: @PR1817_1(
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; CHECK-NEXT: [[B:%.*]] = icmp ult i32 %X, 10
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; CHECK-NEXT: ret i1 [[B]]
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;
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%A = icmp slt i32 %X, 10
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%B = icmp ult i32 %X, 10
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%C = and i1 %A, %B
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|
ret i1 %C
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}
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define i1 @PR1817_2(i32 %X) {
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; CHECK-LABEL: @PR1817_2(
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; CHECK-NEXT: [[A:%.*]] = icmp slt i32 %X, 10
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; CHECK-NEXT: ret i1 [[A]]
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|
;
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%A = icmp slt i32 %X, 10
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%B = icmp ult i32 %X, 10
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%C = or i1 %A, %B
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ret i1 %C
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}
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define i1 @PR2330(i32 %a, i32 %b) {
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; CHECK-LABEL: @PR2330(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 %b, %a
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 8
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp ult i32 %a, 8
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%cmp2 = icmp ult i32 %b, 8
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%and = and i1 %cmp2, %cmp1
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ret i1 %and
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}
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; if LHSC and RHSC differ only by one bit:
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; (X == C1 || X == C2) -> (X | (C1 ^ C2)) == C2
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; PR14708: https://bugs.llvm.org/show_bug.cgi?id=14708
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define i1 @or_eq_with_one_bit_diff_constants1(i32 %x) {
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; CHECK-LABEL: @or_eq_with_one_bit_diff_constants1(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 %x, 1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 51
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp eq i32 %x, 50
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%cmp2 = icmp eq i32 %x, 51
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%or = or i1 %cmp1, %cmp2
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ret i1 %or
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}
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; (X != C1 && X != C2) -> (X | (C1 ^ C2)) != C2
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define i1 @and_ne_with_one_bit_diff_constants1(i32 %x) {
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; CHECK-LABEL: @and_ne_with_one_bit_diff_constants1(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 %x, 1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 51
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp ne i32 %x, 51
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%cmp2 = icmp ne i32 %x, 50
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%and = and i1 %cmp1, %cmp2
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ret i1 %and
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}
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; The constants are not necessarily off-by-one, just off-by-one-bit.
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define i1 @or_eq_with_one_bit_diff_constants2(i32 %x) {
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; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 %x, 32
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 97
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp eq i32 %x, 97
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%cmp2 = icmp eq i32 %x, 65
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|
%or = or i1 %cmp1, %cmp2
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ret i1 %or
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}
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|
define i1 @and_ne_with_one_bit_diff_constants2(i19 %x) {
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; CHECK-LABEL: @and_ne_with_one_bit_diff_constants2(
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; CHECK-NEXT: [[TMP1:%.*]] = or i19 %x, 128
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i19 [[TMP1]], 193
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp ne i19 %x, 65
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%cmp2 = icmp ne i19 %x, 193
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%and = and i1 %cmp1, %cmp2
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ret i1 %and
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}
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; Make sure the constants are treated as unsigned when comparing them.
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define i1 @or_eq_with_one_bit_diff_constants3(i8 %x) {
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; CHECK-LABEL: @or_eq_with_one_bit_diff_constants3(
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; CHECK-NEXT: [[TMP1:%.*]] = or i8 %x, -128
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -2
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp eq i8 %x, 254
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%cmp2 = icmp eq i8 %x, 126
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%or = or i1 %cmp1, %cmp2
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ret i1 %or
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}
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define i1 @and_ne_with_one_bit_diff_constants3(i8 %x) {
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; CHECK-LABEL: @and_ne_with_one_bit_diff_constants3(
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; CHECK-NEXT: [[TMP1:%.*]] = or i8 %x, -128
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], -63
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp ne i8 %x, 65
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%cmp2 = icmp ne i8 %x, 193
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%and = and i1 %cmp1, %cmp2
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ret i1 %and
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}
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; Use an 'add' to eliminate an icmp if the constants are off-by-one (not off-by-one-bit).
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; (X == 13 | X == 14) -> X-13 <u 2
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define i1 @or_eq_with_diff_one(i8 %x) {
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; CHECK-LABEL: @or_eq_with_diff_one(
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; CHECK-NEXT: [[TMP1:%.*]] = add i8 %x, -13
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 2
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp eq i8 %x, 13
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%cmp2 = icmp eq i8 %x, 14
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%or = or i1 %cmp1, %cmp2
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ret i1 %or
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}
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; (X != 40 | X != 39) -> X-39 >u 1
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define i1 @and_ne_with_diff_one(i32 %x) {
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|
; CHECK-LABEL: @and_ne_with_diff_one(
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|
; CHECK-NEXT: [[TMP1:%.*]] = add i32 %x, -39
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i32 [[TMP1]], 1
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; CHECK-NEXT: ret i1 [[TMP2]]
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|
;
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%cmp1 = icmp ne i32 %x, 40
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%cmp2 = icmp ne i32 %x, 39
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|
%and = and i1 %cmp1, %cmp2
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ret i1 %and
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|
}
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; Make sure the constants are treated as signed when comparing them.
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|
|
; PR32524: https://bugs.llvm.org/show_bug.cgi?id=32524
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define i1 @or_eq_with_diff_one_signed(i32 %x) {
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|
|
; CHECK-LABEL: @or_eq_with_diff_one_signed(
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|
|
; CHECK-NEXT: [[TMP1:%.*]] = add i32 %x, 1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 2
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|
; CHECK-NEXT: ret i1 [[TMP2]]
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|
;
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|
|
%cmp1 = icmp eq i32 %x, 0
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|
|
%cmp2 = icmp eq i32 %x, -1
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|
|
%or = or i1 %cmp1, %cmp2
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|
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|
ret i1 %or
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|
|
}
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|
|
define i1 @and_ne_with_diff_one_signed(i64 %x) {
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|
|
; CHECK-LABEL: @and_ne_with_diff_one_signed(
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|
|
; CHECK-NEXT: [[TMP1:%.*]] = add i64 %x, 1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i64 [[TMP1]], 1
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|
; CHECK-NEXT: ret i1 [[TMP2]]
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|
|
;
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|
|
%cmp1 = icmp ne i64 %x, -1
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|
%cmp2 = icmp ne i64 %x, 0
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|
%and = and i1 %cmp1, %cmp2
|
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|
ret i1 %and
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|
|
|
}
|
|
|
|
|
|
|
|
; Vectors with splat constants get the same folds.
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|
|
define <2 x i1> @or_eq_with_one_bit_diff_constants2_splatvec(<2 x i32> %x) {
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|
|
; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2_splatvec(
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|
|
; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> %x, <i32 32, i32 32>
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|
|
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 97, i32 97>
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|
; CHECK-NEXT: ret <2 x i1> [[TMP2]]
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|
|
|
;
|
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|
|
%cmp1 = icmp eq <2 x i32> %x, <i32 97, i32 97>
|
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|
|
%cmp2 = icmp eq <2 x i32> %x, <i32 65, i32 65>
|
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|
|
%or = or <2 x i1> %cmp1, %cmp2
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|
ret <2 x i1> %or
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|
|
}
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|
|
define <2 x i1> @and_ne_with_diff_one_splatvec(<2 x i32> %x) {
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|
|
; CHECK-LABEL: @and_ne_with_diff_one_splatvec(
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|
|
; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> %x, <i32 -39, i32 -39>
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|
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt <2 x i32> [[TMP1]], <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i1> [[TMP2]]
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|
;
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%cmp1 = icmp ne <2 x i32> %x, <i32 40, i32 40>
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%cmp2 = icmp ne <2 x i32> %x, <i32 39, i32 39>
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%and = and <2 x i1> %cmp1, %cmp2
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|
ret <2 x i1> %and
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|
}
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|
; This is a fuzzer-generated test that would assert because
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; we'd get into foldAndOfICmps() without running InstSimplify
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; on an 'and' that should have been killed. It's not obvious
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; why, but removing anything hides the bug, hence the long test.
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define void @simplify_before_foldAndOfICmps() {
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|
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; CHECK-LABEL: @simplify_before_foldAndOfICmps(
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|
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; CHECK-NEXT: [[A8:%.*]] = alloca i16, align 2
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; CHECK-NEXT: [[L7:%.*]] = load i16, i16* [[A8]], align 2
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; CHECK-NEXT: [[C10:%.*]] = icmp ult i16 [[L7]], 2
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|
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; CHECK-NEXT: [[C7:%.*]] = icmp slt i16 [[L7]], 0
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; CHECK-NEXT: [[C18:%.*]] = or i1 [[C7]], [[C10]]
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; CHECK-NEXT: [[L7_LOBIT:%.*]] = ashr i16 [[L7]], 15
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; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[L7_LOBIT]] to i64
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; CHECK-NEXT: [[G26:%.*]] = getelementptr i1, i1* null, i64 [[TMP1]]
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; CHECK-NEXT: store i16 [[L7]], i16* undef, align 2
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; CHECK-NEXT: store i1 [[C18]], i1* undef, align 1
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; CHECK-NEXT: store i1* [[G26]], i1** undef, align 8
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; CHECK-NEXT: ret void
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|
;
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%A8 = alloca i16
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%L7 = load i16, i16* %A8
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%G21 = getelementptr i16, i16* %A8, i8 -1
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%B11 = udiv i16 %L7, -1
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%G4 = getelementptr i16, i16* %A8, i16 %B11
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%L2 = load i16, i16* %G4
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%L = load i16, i16* %G4
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%B23 = mul i16 %B11, %B11
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%L4 = load i16, i16* %A8
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|
%B21 = sdiv i16 %L7, %L4
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%B7 = sub i16 0, %B21
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%B18 = mul i16 %B23, %B7
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|
%C10 = icmp ugt i16 %L, %B11
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|
%B20 = and i16 %L7, %L2
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|
%B1 = mul i1 %C10, true
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|
%C5 = icmp sle i16 %B21, %L
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|
|
%C11 = icmp ule i16 %B21, %L
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|
|
|
%C7 = icmp slt i16 %B20, 0
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|
|
%B29 = srem i16 %L4, %B18
|
|
|
|
%B15 = add i1 %C7, %C10
|
|
|
|
%B19 = add i1 %C11, %B15
|
|
|
|
%C6 = icmp sge i1 %C11, %B19
|
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|
|
%B33 = or i16 %B29, %L4
|
|
|
|
%C13 = icmp uge i1 %C5, %B1
|
|
|
|
%C3 = icmp ult i1 %C13, %C6
|
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|
|
store i16 undef, i16* %G21
|
|
|
|
%C18 = icmp ule i1 %C10, %C7
|
|
|
|
%G26 = getelementptr i1, i1* null, i1 %C3
|
|
|
|
store i16 %B33, i16* undef
|
|
|
|
store i1 %C18, i1* undef
|
|
|
|
store i1* %G26, i1** undef
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2019-07-20 04:48:52 +08:00
|
|
|
define i1 @PR42691_1(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_1(
|
2019-07-25 04:57:29 +08:00
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 %x, 2147483646
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
2019-07-20 04:48:52 +08:00
|
|
|
;
|
|
|
|
%c1 = icmp slt i32 %x, 0
|
|
|
|
%c2 = icmp eq i32 %x, 2147483647
|
|
|
|
%c = or i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_2(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_2(
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %x, -2
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
|
|
|
;
|
|
|
|
%c1 = icmp ult i32 %x, 2147483648
|
|
|
|
%c2 = icmp eq i32 %x, 4294967295
|
|
|
|
%c = or i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_3(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_3(
|
2019-07-25 04:57:29 +08:00
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %x, -2147483647
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
2019-07-20 04:48:52 +08:00
|
|
|
;
|
|
|
|
%c1 = icmp sge i32 %x, 0
|
|
|
|
%c2 = icmp eq i32 %x, -2147483648
|
|
|
|
%c = or i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_4(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_4(
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 %x, 1
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
|
|
|
;
|
|
|
|
%c1 = icmp uge i32 %x, 2147483648
|
|
|
|
%c2 = icmp eq i32 %x, 0
|
|
|
|
%c = or i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_5(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_5(
|
2019-07-25 04:57:29 +08:00
|
|
|
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 %x, -1
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X_OFF]], 2147483645
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
2019-07-20 04:48:52 +08:00
|
|
|
;
|
|
|
|
%c1 = icmp slt i32 %x, 1
|
|
|
|
%c2 = icmp eq i32 %x, 2147483647
|
|
|
|
%c = or i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_6(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_6(
|
2019-07-25 04:57:29 +08:00
|
|
|
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 %x, 2147483647
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X_OFF]], 2147483645
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
2019-07-20 04:48:52 +08:00
|
|
|
;
|
2019-07-20 05:09:21 +08:00
|
|
|
%c1 = icmp ult i32 %x, 2147483649
|
2019-07-20 04:48:52 +08:00
|
|
|
%c2 = icmp eq i32 %x, 4294967295
|
|
|
|
%c = or i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_7(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_7(
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = add i32 %x, -1
|
|
|
|
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP2]]
|
|
|
|
;
|
|
|
|
%c1 = icmp uge i32 %x, 2147483649
|
|
|
|
%c2 = icmp eq i32 %x, 0
|
|
|
|
%c = or i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
2019-07-22 10:43:43 +08:00
|
|
|
|
|
|
|
define i1 @PR42691_8(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_8(
|
2019-07-25 04:57:29 +08:00
|
|
|
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 %x, 2147483647
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], -2147483635
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
2019-07-22 10:43:43 +08:00
|
|
|
;
|
|
|
|
%c1 = icmp slt i32 %x, 14
|
|
|
|
%c2 = icmp ne i32 %x, -2147483648
|
|
|
|
%c = and i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_9(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_9(
|
2019-07-25 04:57:29 +08:00
|
|
|
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 %x, -14
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], 2147483633
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
2019-07-22 10:43:43 +08:00
|
|
|
;
|
|
|
|
%c1 = icmp sgt i32 %x, 13
|
|
|
|
%c2 = icmp ne i32 %x, 2147483647
|
|
|
|
%c = and i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @PR42691_10(i32 %x) {
|
|
|
|
; CHECK-LABEL: @PR42691_10(
|
2019-07-25 04:57:29 +08:00
|
|
|
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 %x, -14
|
|
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], -15
|
|
|
|
; CHECK-NEXT: ret i1 [[TMP1]]
|
2019-07-22 10:43:43 +08:00
|
|
|
;
|
|
|
|
%c1 = icmp ugt i32 %x, 13
|
|
|
|
%c2 = icmp ne i32 %x, 4294967295
|
|
|
|
%c = and i1 %c1, %c2
|
|
|
|
ret i1 %c
|
|
|
|
}
|