llvm-project/llvm/test/MC/ARM/neont2-reciprocal-encoding.s

@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s

.code 16

@ CHECK: vrecpe.u32	d16, d16        @ encoding: [0xfb,0xff,0x20,0x04]
	vrecpe.u32	d16, d16
@ CHECK: vrecpe.u32	q8, q8          @ encoding: [0xfb,0xff,0x60,0x04]
	vrecpe.u32	q8, q8
@ CHECK: vrecpe.f32	d16, d16        @ encoding: [0xfb,0xff,0x20,0x05]
	vrecpe.f32	d16, d16
@ CHECK: vrecpe.f32	q8, q8          @ encoding: [0xfb,0xff,0x60,0x05]
	vrecpe.f32	q8, q8
@ CHECK: vrecps.f32	d16, d16, d17   @ encoding: [0x40,0xef,0xb1,0x0f]
	vrecps.f32	d16, d16, d17
@ CHECK: vrecps.f32	q8, q8, q9      @ encoding: [0x40,0xef,0xf2,0x0f]
	vrecps.f32	q8, q8, q9
@ CHECK: vrsqrte.u32	d16, d16        @ encoding: [0xfb,0xff,0xa0,0x04]
	vrsqrte.u32	d16, d16
@ CHECK: vrsqrte.u32	q8, q8          @ encoding: [0xfb,0xff,0xe0,0x04]
	vrsqrte.u32	q8, q8
@ CHECK: vrsqrte.f32	d16, d16        @ encoding: [0xfb,0xff,0xa0,0x05]
	vrsqrte.f32	d16, d16
@ CHECK: vrsqrte.f32	q8, q8          @ encoding: [0xfb,0xff,0xe0,0x05]
	vrsqrte.f32	q8, q8
@ CHECK: vrsqrts.f32	d16, d16, d17   @ encoding: [0x60,0xef,0xb1,0x0f]
	vrsqrts.f32	d16, d16, d17
@ CHECK: vrsqrts.f32	q8, q8, q9      @ encoding: [0x60,0xef,0xf2,0x0f]
	vrsqrts.f32	q8, q8, q9
Fix misspelled target triples in MC/ARM test commands. llvm-svn: 121901 2010-12-16 06:14:01 +08:00			`@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s \| FileCheck %s`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00
			`.code 16`

Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x04]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrecpe.u32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x04]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrecpe.u32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x05]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrecpe.f32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x05]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrecpe.f32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x0f]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrecps.f32 d16, d16, d17`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x0f]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrecps.f32 q8, q8, q9`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x04]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrsqrte.u32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x04]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrsqrte.u32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x05]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrsqrte.f32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x05]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrsqrte.f32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x0f]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrsqrts.f32 d16, d16, d17`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-04 06:31:40 +08:00			`@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x0f]`
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837 2010-11-12 05:15:47 +08:00			`vrsqrts.f32 q8, q8, q9`