forked from OSchip/llvm-project
107 lines
3.8 KiB
LLVM
107 lines
3.8 KiB
LLVM
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; RUN: opt < %s -sroa -S | FileCheck %s
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target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-f80:128-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
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define void @no_split_on_non_byte_width(i32) {
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; This tests that allocas are not split into slices that are not byte width multiple
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%arg = alloca i32 , align 8
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store i32 %0, i32* %arg
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br label %load_i32
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load_i32:
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; CHECK-LABEL: load_i32:
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; CHECK-NOT: bitcast {{.*}} to i1
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; CHECK-NOT: zext i1
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%r0 = load i32, i32* %arg
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br label %load_i1
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load_i1:
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; CHECK-LABEL: load_i1:
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; CHECK: bitcast {{.*}} to i1
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%p1 = bitcast i32* %arg to i1*
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%t1 = load i1, i1* %p1
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ret void
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}
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; PR18726: Check that we use memcpy and memset to fill out padding when we have
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; a slice with a simple single type whose store size is smaller than the slice
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; size.
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%union.Foo = type { x86_fp80, i64, i64 }
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@foo_copy_source = external constant %union.Foo
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@i64_sink = global i64 0
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define void @memcpy_fp80_padding() {
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%x = alloca %union.Foo
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; Copy from a global.
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%x_i8 = bitcast %union.Foo* %x to i8*
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %x_i8, i8* align 16 bitcast (%union.Foo* @foo_copy_source to i8*), i32 32, i1 false)
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; Access a slice of the alloca to trigger SROA.
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%mid_p = getelementptr %union.Foo, %union.Foo* %x, i32 0, i32 1
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%elt = load i64, i64* %mid_p
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store i64 %elt, i64* @i64_sink
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ret void
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}
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; CHECK-LABEL: define void @memcpy_fp80_padding
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; CHECK: alloca x86_fp80
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32
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; CHECK: load i64, i64* getelementptr inbounds (%union.Foo, %union.Foo* @foo_copy_source, i64 0, i32 1)
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; CHECK: load i64, i64* getelementptr inbounds (%union.Foo, %union.Foo* @foo_copy_source, i64 0, i32 2)
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define void @memset_fp80_padding() {
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%x = alloca %union.Foo
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; Set to all ones.
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%x_i8 = bitcast %union.Foo* %x to i8*
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call void @llvm.memset.p0i8.i32(i8* align 16 %x_i8, i8 -1, i32 32, i1 false)
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; Access a slice of the alloca to trigger SROA.
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%mid_p = getelementptr %union.Foo, %union.Foo* %x, i32 0, i32 1
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%elt = load i64, i64* %mid_p
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store i64 %elt, i64* @i64_sink
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ret void
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}
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; CHECK-LABEL: define void @memset_fp80_padding
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; CHECK: alloca x86_fp80
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; CHECK: call void @llvm.memset.p0i8.i32(i8* align 16 %{{.*}}, i8 -1, i32 16, i1 false)
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; CHECK: store i64 -1, i64* @i64_sink
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%S.vec3float = type { float, float, float }
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%U.vec3float = type { <4 x float> }
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declare i32 @memcpy_vec3float_helper(%S.vec3float*)
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define i32 @memcpy_vec3float_widening(%S.vec3float* %x) {
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; CHECK-LABEL: @memcpy_vec3float_widening(
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; PR18726: Check that SROA does not rewrite a 12-byte memcpy into a 16-byte
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; vector store, hence accidentally putting gibberish onto the stack.
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entry:
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; Create a temporary variable %tmp1 and copy %x[0] into it
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%tmp1 = alloca %S.vec3float, align 4
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%0 = bitcast %S.vec3float* %tmp1 to i8*
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%1 = bitcast %S.vec3float* %x to i8*
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 12, i1 false)
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; The following block does nothing; but appears to confuse SROA
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%unused1 = bitcast %S.vec3float* %tmp1 to %U.vec3float*
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%unused2 = getelementptr inbounds %U.vec3float, %U.vec3float* %unused1, i32 0, i32 0
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%unused3 = load <4 x float>, <4 x float>* %unused2, align 1
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; Create a second temporary and copy %tmp1 into it
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%tmp2 = alloca %S.vec3float, align 4
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%2 = bitcast %S.vec3float* %tmp2 to i8*
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%3 = bitcast %S.vec3float* %tmp1 to i8*
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; CHECK: alloca
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; CHECK-NOT: store <4 x float>
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %2, i8* align 4 %3, i32 12, i1 false)
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%result = call i32 @memcpy_vec3float_helper(%S.vec3float* %tmp2)
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ret i32 %result
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; CHECK: ret i32 %result
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}
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