2016-07-19 02:34:59 +08:00
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; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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2016-05-06 04:07:37 +08:00
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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2013-06-28 23:47:08 +08:00
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2014-11-14 03:56:13 +08:00
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@local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
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2013-06-28 23:47:08 +08:00
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2016-06-03 03:54:26 +08:00
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@lds = addrspace(3) global [512 x i32] undef, align 4
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2016-07-19 02:34:59 +08:00
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; On SI we need to make sure that the base offset is a register and
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; not an immediate.
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2016-06-03 03:54:26 +08:00
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; FUNC-LABEL: {{^}}load_i32_local_const_ptr:
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AMDGPU: Write LDS objects out as global symbols in code generation
Summary:
The symbols use the processor-specific SHN_AMDGPU_LDS section index
introduced with a previous change. The linker is then expected to resolve
relocations, which are also emitted.
Initially disabled for HSA and PAL environments until they have caught up
in terms of linker and runtime loader.
Some notes:
- The llvm.amdgcn.groupstaticsize intrinsics can no longer be lowered
to a constant at compile times, which means some tests can no longer
be applied.
The current "solution" is a terrible hack, but the intrinsic isn't
used by Mesa, so we can keep it for now.
- We no longer know the full LDS size per kernel at compile time, which
means that we can no longer generate a relevant error message at
compile time. It would be possible to add a check for the size of
individual variables, but ultimately the linker will have to perform
the final check.
Change-Id: If66dbf33fccfbf3609aefefa2558ac0850d42275
Reviewers: arsenm, rampitec, t-tye, b-sumner, jsjodin
Subscribers: qcolombet, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61494
llvm-svn: 364297
2019-06-25 19:52:30 +08:00
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; GCN: v_mov_b32_e32 v[[PTR:[0-9]+]], lds@abs32@lo
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; GCN: ds_read_b32 v{{[0-9]+}}, v[[PTR]] offset:4
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2016-07-19 02:34:59 +08:00
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2016-06-03 03:54:26 +08:00
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; R600: LDS_READ_RET
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @load_i32_local_const_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %in) #0 {
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2016-06-03 03:54:26 +08:00
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entry:
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%tmp0 = getelementptr [512 x i32], [512 x i32] addrspace(3)* @lds, i32 0, i32 1
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%tmp1 = load i32, i32 addrspace(3)* %tmp0
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%tmp2 = getelementptr i32, i32 addrspace(1)* %out, i32 1
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store i32 %tmp1, i32 addrspace(1)* %tmp2
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ret void
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}
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; Test loading a i32 and v2i32 value from the same base pointer.
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; FUNC-LABEL: {{^}}load_i32_v2i32_local:
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; R600: LDS_READ_RET
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; R600: LDS_READ_RET
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; R600: LDS_READ_RET
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; GCN-DAG: ds_read_b32
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; GCN-DAG: ds_read2_b32
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @load_i32_v2i32_local(<2 x i32> addrspace(1)* %out, i32 addrspace(3)* %in) #0 {
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2016-06-03 03:54:26 +08:00
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%scalar = load i32, i32 addrspace(3)* %in
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%tmp0 = bitcast i32 addrspace(3)* %in to <2 x i32> addrspace(3)*
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%vec_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(3)* %tmp0, i32 2
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%vec0 = load <2 x i32>, <2 x i32> addrspace(3)* %vec_ptr, align 4
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%vec1 = insertelement <2 x i32> <i32 0, i32 0>, i32 %scalar, i32 0
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%vec = add <2 x i32> %vec0, %vec1
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store <2 x i32> %vec, <2 x i32> addrspace(1)* %out
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ret void
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}
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2016-07-19 02:34:59 +08:00
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attributes #0 = { nounwind }
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