2016-08-09 16:59:05 +08:00
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; RUN: opt %loadPolly -polly-codegen-ppcg -polly-acc-dump-kernel-ir \
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; RUN: -disable-output < %s | \
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; RUN: FileCheck %s -check-prefix=KERNEL-IR
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2016-08-09 17:11:39 +08:00
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; REQUIRES: pollyacc
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2016-08-09 16:59:05 +08:00
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; Ensure that no dead instructions are emitted between the store and the
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; branch instruction of the ScopStmt. At some point, our dead-code-elimination
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; did not remove code that was inserted to compute the old (unused) branch
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; condition. This code referred to CPU registers and consequently resulted
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; in invalid bitcode.
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[PPCGCodeGeneration] Update PPCG Code Generation for OpenCL compatibility
Added a small change to the way pointer arguments are set in the kernel
code generation. The way the pointer is retrieved now, specifically requests
global address space to be annotated. This is necessary, if the IR should be
run through NVPTX to generate OpenCL compatible PTX.
The changes do not affect the PTX Strings generated for the CUDA target
(nvptx64-nvidia-cuda), but are necessary for OpenCL (nvptx64-nvidia-nvcl).
Additionally, the data layout has been updated to what the NVPTX Backend requests/recommends.
Contributed-by: Philipp Schaad
Reviewers: Meinersbur, grosser, bollu
Reviewed By: grosser, bollu
Subscribers: jlebar, pollydev, llvm-commits, nemanjai, yaxunl, Anastasia
Tags: #polly
Differential Revision: https://reviews.llvm.org/D32215
llvm-svn: 301299
2017-04-25 16:08:29 +08:00
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; KERNEL-IR: store i32 0, i32 addrspace(1)* %polly.access.MemRef_sum_c, align 4
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2016-08-09 16:59:05 +08:00
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; KERNEL-IR-NEXT: br label %polly.merge
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @kernel_dynprog([50 x [50 x i32]]* %sum_c) {
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entry:
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br label %for.cond1.preheader
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for.cond1.preheader: ; preds = %entry
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br label %for.body3
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for.cond4.for.cond1.loopexit_crit_edge: ; preds = %for.end
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br label %for.cond1.loopexit
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for.cond1.loopexit: ; preds = %for.cond4.for.cond1.loopexit_crit_edge
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br i1 undef, label %for.body3, label %for.inc55
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for.body3: ; preds = %for.cond1.loopexit, %for.cond1.preheader
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%indvars.iv55 = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next56, %for.cond1.loopexit ]
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%indvars.iv.next56 = add nuw nsw i64 %indvars.iv55, 1
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br label %for.body6
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for.body6: ; preds = %for.end, %for.body3
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%indvars.iv50 = phi i64 [ 0, %for.body3 ], [ %indvars.iv.next51, %for.end ]
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%arrayidx10 = getelementptr inbounds [50 x [50 x i32]], [50 x [50 x i32]]* %sum_c, i64 %indvars.iv55, i64 %indvars.iv50, i64 %indvars.iv55
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store i32 0, i32* %arrayidx10, align 4
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%cmp1334 = icmp slt i64 %indvars.iv.next56, %indvars.iv50
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br i1 %cmp1334, label %for.body14.lr.ph, label %for.end
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for.body14.lr.ph: ; preds = %for.body6
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br label %for.body14
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for.body14: ; preds = %for.body14, %for.body14.lr.ph
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%arrayidx32 = getelementptr inbounds [50 x [50 x i32]], [50 x [50 x i32]]* %sum_c, i64 %indvars.iv55, i64 %indvars.iv50, i64 0
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br i1 false, label %for.body14, label %for.cond12.for.end_crit_edge
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for.cond12.for.end_crit_edge: ; preds = %for.body14
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br label %for.end
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for.end: ; preds = %for.cond12.for.end_crit_edge, %for.body6
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%indvars.iv.next51 = add nuw nsw i64 %indvars.iv50, 1
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%lftr.wideiv53 = trunc i64 %indvars.iv.next51 to i32
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%exitcond54 = icmp ne i32 %lftr.wideiv53, 50
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br i1 %exitcond54, label %for.body6, label %for.cond4.for.cond1.loopexit_crit_edge
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for.inc55: ; preds = %for.cond1.loopexit
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unreachable
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}
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