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llvm-project/llvm/test/CodeGen/AMDGPU/hsa-func-align.ll

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AMDGPU: Don't align callable functions to 256 llvm-svn: 300720
2017-04-20 01:42:39 +08:00
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri < %s | FileCheck -check-prefix=HSA %s
[llvm-readobj] Update tests because of changes in llvm-readobj behavior This patch updates tests using llvm-readobj and llvm-readelf, because soon reading from stdin will be achievable only via a '-' as described here: https://bugs.llvm.org/show_bug.cgi?id=46400. Patch with changes to llvm-readobj behavior is here: https://reviews.llvm.org/D83704 Differential Revision: https://reviews.llvm.org/D83912 Reviewed by: jhenderson, MaskRay, grimar
2020-07-20 15:39:14 +08:00
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -filetype=obj < %s | llvm-readobj --symbols -S --sd - | FileCheck -check-prefix=ELF %s
AMDGPU: Don't align callable functions to 256 llvm-svn: 300720
2017-04-20 01:42:39 +08:00
; ELF: Section {
; ELF: Name: .text
; ELF: SHF_ALLOC (0x2)
; ELF: SHF_EXECINSTR (0x4)
; ELF: AddressAlignment: 32
; ELF: }
; HSA: .globl simple_align16
; HSA: .p2align 5
[AMDGPU] Change constant addr space to 4 Differential Revision: https://reviews.llvm.org/D43170 llvm-svn: 325030
2018-02-14 02:00:25 +08:00
define void @simple_align16(i32 addrspace(1)* addrspace(4)* %ptr.out) align 32 {
AMDGPU: Don't align callable functions to 256 llvm-svn: 300720
2017-04-20 01:42:39 +08:00
entry:
[AMDGPU] Change constant addr space to 4 Differential Revision: https://reviews.llvm.org/D43170 llvm-svn: 325030
2018-02-14 02:00:25 +08:00
%out = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* %ptr.out
AMDGPU: Don't align callable functions to 256 llvm-svn: 300720
2017-04-20 01:42:39 +08:00
store i32 0, i32 addrspace(1)* %out
ret void
}