AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2019-02-08 03:10:15 +08:00
# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_s1
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s1
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK: $vgpr0 = COPY [[DEF]](s32)
%0:_(s1) = G_IMPLICIT_DEF
%1:_(s32) = G_ANYEXT %0
$vgpr0 = COPY %1
...
---
name: test_implicit_def_s7
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s7
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
; CHECK: $vgpr0 = COPY [[COPY]](s32)
%0:_(s7) = G_IMPLICIT_DEF
%1:_(s32) = G_ANYEXT %0
$vgpr0 = COPY %1
...
---
name: test_implicit_def_s8
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s8
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
; CHECK: $vgpr0 = COPY [[COPY]](s32)
%0:_(s8) = G_IMPLICIT_DEF
%1:_(s32) = G_ANYEXT %0
$vgpr0 = COPY %1
...
---
name: test_implicit_def_s16
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s16
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
2019-09-05 00:19:45 +08:00
; CHECK: $vgpr0 = COPY [[DEF]](s32)
2019-02-08 03:10:15 +08:00
%0:_(s16) = G_IMPLICIT_DEF
%1:_(s32) = G_ANYEXT %0
$vgpr0 = COPY %1
...
---
name: test_implicit_def_s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s32
; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK: $vgpr0 = COPY [[DEF]](s32)
%0:_(s32) = G_IMPLICIT_DEF
$vgpr0 = COPY %0
...
2019-02-08 22:46:27 +08:00
---
name: test_implicit_def_48
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_48
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY [[DEF]](s64)
; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](s64)
%0:_(s48) = G_IMPLICIT_DEF
%1:_(s64) = G_ANYEXT %0
$vgpr0_vgpr1 = COPY %1
...
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_s64
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s64
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](s64)
%0:_(s64) = G_IMPLICIT_DEF
$vgpr0_vgpr1 = COPY %0
...
2019-02-08 22:46:27 +08:00
---
name: test_implicit_def_s65
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s65
; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
; CHECK: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[DEF]](s128)
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[TRUNC]](s96)
%0:_(s65) = G_IMPLICIT_DEF
%1:_(s96) = G_ANYEXT %0
$vgpr0_vgpr1_vgpr2 = COPY %1
...
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_s128
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s128
; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](s128)
%0:_(s128) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
...
AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
---
2019-02-08 03:10:15 +08:00
name: test_implicit_def_256
AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
body: |
bb.0:
2019-02-08 03:10:15 +08:00
; CHECK-LABEL: name: test_implicit_def_256
; CHECK: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[DEF]](s256)
%0:_(s256) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %0
...
---
name: test_implicit_def_s448
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s448
AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48777
llvm-svn: 336041
2018-06-30 12:09:44 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(s448) = G_IMPLICIT_DEF
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[DEF]](s448), 0
; CHECK: $vgpr0 = COPY [[EXTRACT]](s32)
%0:_(s448) = G_IMPLICIT_DEF
%1:_(s32) = G_EXTRACT %0, 0
$vgpr0 = COPY %1
...
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_s512
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s512
; CHECK: [[DEF:%[0-9]+]]:_(s512) = G_IMPLICIT_DEF
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[DEF]](s512), 0
; CHECK: $vgpr0 = COPY [[EXTRACT]](s32)
%0:_(s512) = G_IMPLICIT_DEF
%1:_(s32) = G_EXTRACT %0, 0
$vgpr0 = COPY %1
...
---
name: test_implicit_def_s1024
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s1024
2019-10-02 00:35:06 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(s1024) = G_IMPLICIT_DEF
; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[DEF]](s1024), 0
2019-02-08 03:10:15 +08:00
; CHECK: $vgpr0 = COPY [[EXTRACT]](s32)
%0:_(s1024) = G_IMPLICIT_DEF
%1:_(s32) = G_EXTRACT %0, 0
$vgpr0 = COPY %1
...
2020-03-23 23:14:30 +08:00
---
name: test_implicit_def_s1056
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s1056
[GlobalISel] support narrow G_IMPLICIT_DEF for DstSize % NarrowSize != 0
Summary:
When narrowing G_IMPLICIT_DEF where the original size is not a multiple
of the narrow size, emit a smaller G_IMPLICIT_DEF and use G_ANYEXT.
To prevent a potential endless loop in the legalizer, the condition
to combine G_ANYEXT(G_IMPLICIT_DEF) is changed from isInstUnsupported
to !isInstLegal, since in this case the combine is only valid if
consequent legalization of the newly combined G_IMPLICIT_DEF does not
introduce G_ANYEXT due to narrowing.
Although this legalization for G_IMPLICIT_DEF would also be valid for
the general case, it actually caused a lot of code regressions when
tried due to superfluous COPYs and combines not getting hit anymore.
Reviewers: dsanders, aemerson, volkan, arsenm, aditya_nandakumar
Reviewed By: arsenm
Subscribers: jvesely, nhaehnle, kerbowa, wdng, rovka, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76598
2020-03-23 19:30:55 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(s1024) = G_IMPLICIT_DEF
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s1024)
; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
2020-03-23 19:58:55 +08:00
; CHECK: $vgpr0 = COPY [[UV]](s32)
2020-03-23 23:14:30 +08:00
%0:_(s1056) = G_IMPLICIT_DEF
%1:_(s32) = G_TRUNC %0
$vgpr0 = COPY %1
...
---
name: test_implicit_def_s2048
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s2048
; CHECK: [[DEF:%[0-9]+]]:_(s1024) = G_IMPLICIT_DEF
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s1024)
; CHECK: $vgpr0 = COPY [[TRUNC]](s32)
%0:_(s2048) = G_IMPLICIT_DEF
%1:_(s32) = G_TRUNC %0
$vgpr0 = COPY %1
...
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_v2s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v2s32
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](<2 x s32>)
%0:_(<2 x s32>) = G_IMPLICIT_DEF
$vgpr0_vgpr1 = COPY %0
...
---
name: test_implicit_def_v3s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v3s32
; CHECK: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[DEF]](<3 x s32>)
%0:_(<3 x s32>) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2 = COPY %0
...
---
name: test_implicit_def_v4s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v4s32
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](<4 x s32>)
%0:_(<4 x s32>) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
...
2019-02-26 04:46:06 +08:00
---
name: test_implicit_def_v5s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v5s32
; CHECK: [[DEF:%[0-9]+]]:_(<5 x s32>) = G_IMPLICIT_DEF
; CHECK: S_NOP 0, implicit [[DEF]](<5 x s32>)
%0:_(<5 x s32>) = G_IMPLICIT_DEF
S_NOP 0, implicit %0
...
---
name: test_implicit_def_v6s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v6s32
; CHECK: [[DEF:%[0-9]+]]:_(<6 x s32>) = G_IMPLICIT_DEF
; CHECK: S_NOP 0, implicit [[DEF]](<6 x s32>)
%0:_(<6 x s32>) = G_IMPLICIT_DEF
S_NOP 0, implicit %0
...
---
name: test_implicit_def_v7s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v7s32
; CHECK: [[DEF:%[0-9]+]]:_(<7 x s32>) = G_IMPLICIT_DEF
; CHECK: S_NOP 0, implicit [[DEF]](<7 x s32>)
%0:_(<7 x s32>) = G_IMPLICIT_DEF
S_NOP 0, implicit %0
...
---
name: test_implicit_def_v8s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v8s32
; CHECK: [[DEF:%[0-9]+]]:_(<8 x s32>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[DEF]](<8 x s32>)
%0:_(<8 x s32>) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %0
...
---
name: test_implicit_def_v16s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v16s32
; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[DEF]](<16 x s32>)
%0:_(<16 x s32>) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %0
...
---
name: test_implicit_def_v17s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v17s32
; CHECK: [[DEF:%[0-9]+]]:_(<17 x s32>) = G_IMPLICIT_DEF
; CHECK: S_NOP 0, implicit [[DEF]](<17 x s32>)
%0:_(<17 x s32>) = G_IMPLICIT_DEF
S_NOP 0, implicit %0
...
---
name: test_implicit_def_v32s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v32s32
2019-10-02 00:35:06 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<32 x s32>) = G_IMPLICIT_DEF
; CHECK: S_NOP 0, implicit [[DEF]](<32 x s32>)
2019-02-26 04:46:06 +08:00
%0:_(<32 x s32>) = G_IMPLICIT_DEF
S_NOP 0, implicit %0
...
2020-03-23 23:14:30 +08:00
---
name: test_implicit_def_v33s32
body: |
bb.0:
2020-07-28 22:15:30 +08:00
liveins: $vgpr0_vgpr1
2020-03-23 23:14:30 +08:00
; CHECK-LABEL: name: test_implicit_def_v33s32
2020-07-28 22:15:30 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
2020-07-28 22:15:42 +08:00
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
2020-07-28 22:15:30 +08:00
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CHECK: G_STORE [[UV]](s32), [[COPY]](p1) :: (volatile store 4, addrspace 1)
2020-07-28 22:15:42 +08:00
; CHECK: G_STORE [[UV16]](s32), [[COPY]](p1) :: (volatile store 4, addrspace 1)
2020-03-23 23:14:30 +08:00
%0:_(<33 x s32>) = G_IMPLICIT_DEF
%1:_(s32), %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32), %6:_(s32), %7:_(s32), %8:_(s32), %9:_(s32), %10:_(s32), %11:_(s32), %12:_(s32), %13:_(s32), %14:_(s32), %15:_(s32), %16:_(s32), %17:_(s32), %18:_(s32), %19:_(s32), %20:_(s32), %21:_(s32), %22:_(s32), %23:_(s32), %24:_(s32), %25:_(s32), %26:_(s32), %27:_(s32), %28:_(s32), %29:_(s32), %30:_(s32), %31:_(s32), %32:_(s32), %33:_(s32) = G_UNMERGE_VALUES %0
2020-07-28 22:15:30 +08:00
%34:_(p1) = COPY $vgpr0_vgpr1
G_STORE %1, %34 :: (volatile store 4, align 4, addrspace 1)
G_STORE %33, %34 :: (volatile store 4, align 4, addrspace 1)
2020-03-23 23:14:30 +08:00
...
---
name: test_implicit_def_v64s32
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v64s32
; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
2020-07-28 22:15:30 +08:00
; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<64 x s32>) = G_CONCAT_VECTORS [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>)
; CHECK: [[CONCAT_VECTORS1:%[0-9]+]]:_(<32 x s32>) = G_CONCAT_VECTORS [[DEF]](<16 x s32>), [[DEF]](<16 x s32>)
2020-03-23 23:14:30 +08:00
; CHECK: S_NOP 0, implicit [[CONCAT_VECTORS]](<64 x s32>), implicit [[CONCAT_VECTORS1]](<32 x s32>)
%0:_(<64 x s32>) = G_IMPLICIT_DEF
%1:_(<32 x s32>), %2:_(<32 x s32>) = G_UNMERGE_VALUES %0
S_NOP 0, implicit %0, implicit %1
...
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_v2s1
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v2s1
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY [[DEF]](<2 x s32>)
; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](<2 x s32>)
%0:_(<2 x s1>) = G_IMPLICIT_DEF
%1:_(<2 x s32>) = G_ANYEXT %0
$vgpr0_vgpr1 = COPY %1
...
2019-02-12 06:00:39 +08:00
---
name: test_implicit_def_v3s1
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v3s1
2020-07-19 00:35:28 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>)
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]](<3 x s32>)
2019-02-12 06:00:39 +08:00
%0:_(<3 x s1>) = G_IMPLICIT_DEF
%1:_(<3 x s32>) = G_ANYEXT %0
$vgpr0_vgpr1_vgpr2 = COPY %1
...
---
name: test_implicit_def_v2s8
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v2s8
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY [[DEF]](<2 x s32>)
; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](<2 x s32>)
%0:_(<2 x s8>) = G_IMPLICIT_DEF
%1:_(<2 x s32>) = G_ANYEXT %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_implicit_def_v3s8
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v3s8
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
2020-02-03 06:42:02 +08:00
; CHECK: [[DEF1:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
2020-08-20 20:55:08 +08:00
; CHECK: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[DEF1]](<4 x s32>)
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<4 x s32>)
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV2]](s32)
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
2019-02-12 06:00:39 +08:00
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
%0:_(<3 x s8>) = G_IMPLICIT_DEF
%1:_(<3 x s32>) = G_ANYEXT %0
$vgpr0_vgpr1_vgpr2 = COPY %1
...
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_v2s16
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v2s16
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF
; CHECK: $vgpr0 = COPY [[DEF]](<2 x s16>)
%0:_(<2 x s16>) = G_IMPLICIT_DEF
$vgpr0 = COPY %0
...
---
name: test_implicit_def_v3s16
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v3s16
2019-02-12 06:00:39 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
2019-02-08 03:10:15 +08:00
; CHECK: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
2020-09-30 03:22:30 +08:00
; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>)
; CHECK: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>)
2020-02-03 06:42:02 +08:00
; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0
2019-02-08 03:10:15 +08:00
; CHECK: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>)
%0:_(<3 x s16>) = G_IMPLICIT_DEF
%1:_(<4 x s16>) = G_IMPLICIT_DEF
%2:_(<4 x s16>) = G_INSERT %1, %0, 0
$vgpr0_vgpr1 = COPY %2
...
---
name: test_implicit_def_v4s16
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v4s16
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](<4 x s16>)
%0:_(<4 x s16>) = G_IMPLICIT_DEF
$vgpr0_vgpr1 = COPY %0
...
2019-02-12 06:00:39 +08:00
---
name: test_implicit_def_v5s16
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v5s16
2020-05-31 12:14:56 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<6 x s16>) = G_IMPLICIT_DEF
2020-02-03 06:42:02 +08:00
; CHECK: [[DEF1:%[0-9]+]]:_(<6 x s16>) = G_IMPLICIT_DEF
; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<30 x s16>) = G_CONCAT_VECTORS [[DEF]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>)
; CHECK: [[UV:%[0-9]+]]:_(<5 x s16>), [[UV1:%[0-9]+]]:_(<5 x s16>), [[UV2:%[0-9]+]]:_(<5 x s16>), [[UV3:%[0-9]+]]:_(<5 x s16>), [[UV4:%[0-9]+]]:_(<5 x s16>), [[UV5:%[0-9]+]]:_(<5 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<30 x s16>)
; CHECK: [[DEF2:%[0-9]+]]:_(<8 x s16>) = G_IMPLICIT_DEF
; CHECK: [[INSERT:%[0-9]+]]:_(<8 x s16>) = G_INSERT [[DEF2]], [[UV]](<5 x s16>), 0
2019-02-12 06:00:39 +08:00
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](<8 x s16>)
%0:_(<5 x s16>) = G_IMPLICIT_DEF
%1:_(<8 x s16>) = G_IMPLICIT_DEF
%2:_(<8 x s16>) = G_INSERT %1, %0, 0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
...
---
name: test_implicit_def_v6s16
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v6s16
2020-05-31 12:14:56 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<6 x s16>) = G_IMPLICIT_DEF
; CHECK: [[DEF1:%[0-9]+]]:_(<8 x s16>) = G_IMPLICIT_DEF
; CHECK: [[INSERT:%[0-9]+]]:_(<8 x s16>) = G_INSERT [[DEF1]], [[DEF]](<6 x s16>), 0
2019-02-12 06:00:39 +08:00
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](<8 x s16>)
%0:_(<6 x s16>) = G_IMPLICIT_DEF
%1:_(<8 x s16>) = G_IMPLICIT_DEF
%2:_(<8 x s16>) = G_INSERT %1, %0, 0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
...
2019-02-08 03:10:15 +08:00
---
name: test_implicit_def_v8s16
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v8s16
2020-05-31 12:14:56 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<8 x s16>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](<8 x s16>)
2019-02-08 03:10:15 +08:00
%0:_(<8 x s16>) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
...
---
name: test_implicit_def_v2s64
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v2s64
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](<2 x s64>)
%0:_(<2 x s64>) = G_IMPLICIT_DEF
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %0
...
---
name: test_implicit_def_v4s8
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v4s8
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
; CHECK: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[DEF]](<4 x s32>)
; CHECK: $vgpr0 = COPY [[TRUNC]](<4 x s8>)
%0:_(<4 x s8>) = G_IMPLICIT_DEF
$vgpr0 = COPY %0
...
---
name: test_implicit_def_p0
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_p0
; CHECK: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p0)
%0:_(p0) = G_IMPLICIT_DEF
$vgpr0_vgpr1 = COPY %0
...
---
name: test_implicit_def_p1
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_p1
; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p1)
%0:_(p1) = G_IMPLICIT_DEF
$vgpr0_vgpr1 = COPY %0
...
---
name: test_implicit_def_p2
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_p2
; CHECK: [[DEF:%[0-9]+]]:_(p2) = G_IMPLICIT_DEF
; CHECK: $vgpr0 = COPY [[DEF]](p2)
%0:_(p2) = G_IMPLICIT_DEF
$vgpr0 = COPY %0
...
---
name: test_implicit_def_p3
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_p3
; CHECK: [[DEF:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
; CHECK: $vgpr0 = COPY [[DEF]](p3)
%0:_(p3) = G_IMPLICIT_DEF
$vgpr0 = COPY %0
...
---
name: test_implicit_def_p4
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_p4
; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p4)
%0:_(p4) = G_IMPLICIT_DEF
$vgpr0_vgpr1 = COPY %0
...
---
name: test_implicit_def_p5
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_p5
; CHECK: [[DEF:%[0-9]+]]:_(p5) = G_IMPLICIT_DEF
; CHECK: $vgpr0 = COPY [[DEF]](p5)
%0:_(p5) = G_IMPLICIT_DEF
$vgpr0 = COPY %0
...
---
name: test_implicit_def_p999
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_p999
; CHECK: [[DEF:%[0-9]+]]:_(p999) = G_IMPLICIT_DEF
; CHECK: $vgpr0_vgpr1 = COPY [[DEF]](p999)
%0:_(p999) = G_IMPLICIT_DEF
$vgpr0_vgpr1 = COPY %0
2020-03-23 23:14:30 +08:00
...
---
name: test_implicit_def_v2s1024
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v2s1024
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s1024>) = G_IMPLICIT_DEF
; CHECK: [[UV:%[0-9]+]]:_(s1024), [[UV1:%[0-9]+]]:_(s1024) = G_UNMERGE_VALUES [[DEF]](<2 x s1024>)
; CHECK: S_ENDPGM 0, implicit [[UV]](s1024), implicit [[UV1]](s1024)
%0:_(<2 x s1024>) = G_IMPLICIT_DEF
%1:_(s1024), %2:_(s1024) = G_UNMERGE_VALUES %0
S_ENDPGM 0, implicit %1, implicit %2
...
---
name: test_implicit_def_v3s1024
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_v3s1024
; CHECK: [[DEF:%[0-9]+]]:_(<3 x s1024>) = G_IMPLICIT_DEF
; CHECK: [[UV:%[0-9]+]]:_(s1024), [[UV1:%[0-9]+]]:_(s1024), [[UV2:%[0-9]+]]:_(s1024) = G_UNMERGE_VALUES [[DEF]](<3 x s1024>)
; CHECK: S_ENDPGM 0, implicit [[UV]](s1024), implicit [[UV1]](s1024), implicit [[UV2]](s1024)
%0:_(<3 x s1024>) = G_IMPLICIT_DEF
%1:_(s1024), %2:_(s1024), %3:_(s1024) = G_UNMERGE_VALUES %0
S_ENDPGM 0, implicit %1, implicit %2, implicit %3
2019-02-08 03:10:15 +08:00
...
