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llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir

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AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics This enables GlobalISel to handle various intrinsics. The custom node pattern will be ignored, and the intrinsic will work. This will also allow SelectionDAG to directly select the intrinsics, but as they are all custom lowered to the nodes, this ends up leaving dead code in the table. Eventually either GlobalISel should add the equivalent of custom nodes equivalent, or intrinsics should be directly used. These each have different tradeoffs. There are a few more to handle, but these are easy to handle ones. Some others fail for other reasons. llvm-svn: 371432
2019-09-10 02:10:31 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
---
name: rcp_s32_vs
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: rcp_s32_vs
; CHECK: liveins: $sgpr0
AMDGPU: Relax 32-bit SGPR register class Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This will allow the register coalescer to do a better job eliminating copies to m0. For GlobalISel, as a terrible hack, use SGPR_32 for things that should use SCC until booleans are solved. llvm-svn: 375267
2019-10-19 02:26:37 +08:00
; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
GlobalISel: Infer nofpexcept flag during selection for non-strict ops Match SelectionDAG's behavior of adding nofpexcept to out instructions that may raise fp exceptions that are selected from instructions that do not.
2020-06-01 02:19:46 +08:00
; CHECK: %1:vgpr_32 = nofpexcept V_RCP_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; CHECK: S_ENDPGM 0, implicit %1
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics This enables GlobalISel to handle various intrinsics. The custom node pattern will be ignored, and the intrinsic will work. This will also allow SelectionDAG to directly select the intrinsics, but as they are all custom lowered to the nodes, this ends up leaving dead code in the table. Eventually either GlobalISel should add the equivalent of custom nodes equivalent, or intrinsics should be directly used. These each have different tradeoffs. There are a few more to handle, but these are easy to handle ones. Some others fail for other reasons. llvm-svn: 371432
2019-09-10 02:10:31 +08:00
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
S_ENDPGM 0, implicit %1
...
---
name: rcp_s32_vv
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: rcp_s32_vv
; CHECK: liveins: $vgpr0
; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
GlobalISel: Infer nofpexcept flag during selection for non-strict ops Match SelectionDAG's behavior of adding nofpexcept to out instructions that may raise fp exceptions that are selected from instructions that do not.
2020-06-01 02:19:46 +08:00
; CHECK: %1:vgpr_32 = nofpexcept V_RCP_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; CHECK: S_ENDPGM 0, implicit %1
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics This enables GlobalISel to handle various intrinsics. The custom node pattern will be ignored, and the intrinsic will work. This will also allow SelectionDAG to directly select the intrinsics, but as they are all custom lowered to the nodes, this ends up leaving dead code in the table. Eventually either GlobalISel should add the equivalent of custom nodes equivalent, or intrinsics should be directly used. These each have different tradeoffs. There are a few more to handle, but these are easy to handle ones. Some others fail for other reasons. llvm-svn: 371432
2019-09-10 02:10:31 +08:00
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
S_ENDPGM 0, implicit %1
...
---
name: rcp_s64_vs
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: rcp_s64_vs
; CHECK: liveins: $sgpr0_sgpr1
AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs We don't use the xexec register classes for arbitrary values anymore. Avoids a test variance beween GlobalISel and SelectionDAG>
2020-01-13 06:10:18 +08:00
; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
GlobalISel: Infer nofpexcept flag during selection for non-strict ops Match SelectionDAG's behavior of adding nofpexcept to out instructions that may raise fp exceptions that are selected from instructions that do not.
2020-06-01 02:19:46 +08:00
; CHECK: %1:vreg_64 = nofpexcept V_RCP_F64_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; CHECK: S_ENDPGM 0, implicit %1
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics This enables GlobalISel to handle various intrinsics. The custom node pattern will be ignored, and the intrinsic will work. This will also allow SelectionDAG to directly select the intrinsics, but as they are all custom lowered to the nodes, this ends up leaving dead code in the table. Eventually either GlobalISel should add the equivalent of custom nodes equivalent, or intrinsics should be directly used. These each have different tradeoffs. There are a few more to handle, but these are easy to handle ones. Some others fail for other reasons. llvm-svn: 371432
2019-09-10 02:10:31 +08:00
%0:sgpr(s64) = COPY $sgpr0_sgpr1
%1:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
S_ENDPGM 0, implicit %1
...
---
name: rcp_s64_vv
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: rcp_s64_vv
; CHECK: liveins: $vgpr0_vgpr1
; CHECK: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
GlobalISel: Infer nofpexcept flag during selection for non-strict ops Match SelectionDAG's behavior of adding nofpexcept to out instructions that may raise fp exceptions that are selected from instructions that do not.
2020-06-01 02:19:46 +08:00
; CHECK: %1:vreg_64 = nofpexcept V_RCP_F64_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; CHECK: S_ENDPGM 0, implicit %1
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics This enables GlobalISel to handle various intrinsics. The custom node pattern will be ignored, and the intrinsic will work. This will also allow SelectionDAG to directly select the intrinsics, but as they are all custom lowered to the nodes, this ends up leaving dead code in the table. Eventually either GlobalISel should add the equivalent of custom nodes equivalent, or intrinsics should be directly used. These each have different tradeoffs. There are a few more to handle, but these are easy to handle ones. Some others fail for other reasons. llvm-svn: 371432
2019-09-10 02:10:31 +08:00
%0:vgpr(s64) = COPY $vgpr0_vgpr1
%1:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
S_ENDPGM 0, implicit %1
...