llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI  %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9  %s

---
name: test_fneg_s32
body: |
  bb.0:
    liveins: $vgpr0

    ; SI-LABEL: name: test_fneg_s32
    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; SI: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[COPY]]
    ; SI: $vgpr0 = COPY [[FNEG]](s32)
    ; VI-LABEL: name: test_fneg_s32
    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; VI: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[COPY]]
    ; VI: $vgpr0 = COPY [[FNEG]](s32)
    ; GFX9-LABEL: name: test_fneg_s32
    ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX9: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[COPY]]
    ; GFX9: $vgpr0 = COPY [[FNEG]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_FNEG %0
    $vgpr0 = COPY %1
...
---
name: test_fneg_s64
body: |
  bb.0:
    liveins: $vgpr0

    ; SI-LABEL: name: test_fneg_s64
    ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[COPY]]
    ; SI: $vgpr0_vgpr1 = COPY [[FNEG]](s64)
    ; VI-LABEL: name: test_fneg_s64
    ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; VI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[COPY]]
    ; VI: $vgpr0_vgpr1 = COPY [[FNEG]](s64)
    ; GFX9-LABEL: name: test_fneg_s64
    ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX9: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[COPY]]
    ; GFX9: $vgpr0_vgpr1 = COPY [[FNEG]](s64)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s64) = G_FNEG %0
    $vgpr0_vgpr1 = COPY %1
...
---
name: test_fneg_s16
body: |
  bb.0:
    liveins: $vgpr0

    ; SI-LABEL: name: test_fneg_s16
    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
    ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
    ; SI: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[FPEXT]]
    ; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEG]](s32)
    ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
    ; SI: $vgpr0 = COPY [[ANYEXT]](s32)
    ; VI-LABEL: name: test_fneg_s16
    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
    ; VI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
    ; VI: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[FPEXT]]
    ; VI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEG]](s32)
    ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
    ; VI: $vgpr0 = COPY [[ANYEXT]](s32)
    ; GFX9-LABEL: name: test_fneg_s16
    ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
    ; GFX9: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
    ; GFX9: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[FPEXT]]
    ; GFX9: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEG]](s32)
    ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
    ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s16) = G_TRUNC %0
    %2:_(s16) = G_FNEG %1
    %3:_(s32) = G_ANYEXT %2
    $vgpr0 = COPY %3
...