2017-05-18 15:04:48 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2017-07-07 02:27:34 +08:00
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+SSE2 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+SSSE3 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSSE3
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefix=AVX512
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2017-05-18 15:04:48 +08:00
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define i16 @v16i16(<16 x i16> %a, <16 x i16> %b) {
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2017-07-07 02:27:34 +08:00
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; SSE2-SSSE3-LABEL: v16i16:
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; SSE2-SSSE3: # BB#0:
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; SSE2-SSSE3-NEXT: pcmpgtw %xmm3, %xmm1
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; SSE2-SSSE3-NEXT: pcmpgtw %xmm2, %xmm0
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; SSE2-SSSE3-NEXT: packsswb %xmm1, %xmm0
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; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
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; SSE2-SSSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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; SSE2-SSSE3-NEXT: retq
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;
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; AVX1-LABEL: v16i16:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
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; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
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; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vpmovmskb %xmm0, %eax
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; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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2017-05-18 15:04:48 +08:00
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; AVX2-LABEL: v16i16:
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2017-07-07 02:27:34 +08:00
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; AVX2: # BB#0:
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2017-05-18 15:04:48 +08:00
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; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
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2017-06-01 19:27:57 +08:00
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; AVX2-NEXT: vpmovmskb %xmm0, %eax
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2017-07-07 02:27:34 +08:00
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; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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2017-05-18 15:04:48 +08:00
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: v16i16:
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2017-07-07 02:27:34 +08:00
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; AVX512: # BB#0:
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2017-05-18 15:04:48 +08:00
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; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
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; AVX512-NEXT: kmovd %k0, %eax
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2017-07-07 02:27:34 +08:00
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; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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2017-05-18 15:04:48 +08:00
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%x = icmp sgt <16 x i16> %a, %b
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%res = bitcast <16 x i1> %x to i16
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ret i16 %res
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}
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define i8 @v8i32(<8 x i32> %a, <8 x i32> %b) {
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2017-07-07 02:27:34 +08:00
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; SSE2-LABEL: v8i32:
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; SSE2: # BB#0:
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; SSE2-NEXT: pcmpgtd %xmm3, %xmm1
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
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; SSE2-NEXT: packsswb %xmm1, %xmm0
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: packuswb %xmm0, %xmm0
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; SSE2-NEXT: pmovmskb %xmm0, %eax
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; SSE2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: v8i32:
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; SSSE3: # BB#0:
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; SSSE3-NEXT: pcmpgtd %xmm3, %xmm1
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; SSSE3-NEXT: pcmpgtd %xmm2, %xmm0
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; SSSE3-NEXT: packsswb %xmm1, %xmm0
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; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; SSSE3-NEXT: pmovmskb %xmm0, %eax
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; SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; SSSE3-NEXT: retq
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;
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; AVX1-LABEL: v8i32:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
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; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
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; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
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2017-09-19 01:58:31 +08:00
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: vmovmskps %ymm0, %eax
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2017-07-07 02:27:34 +08:00
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; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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2017-05-18 15:04:48 +08:00
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; AVX2-LABEL: v8i32:
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2017-07-07 02:27:34 +08:00
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; AVX2: # BB#0:
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2017-05-18 15:04:48 +08:00
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; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
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2017-06-01 19:27:57 +08:00
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; AVX2-NEXT: vmovmskps %ymm0, %eax
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2017-07-07 02:27:34 +08:00
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; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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2017-05-18 15:04:48 +08:00
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: v8i32:
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2017-07-07 02:27:34 +08:00
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; AVX512: # BB#0:
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2017-05-18 15:04:48 +08:00
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; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
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; AVX512-NEXT: kmovd %k0, %eax
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2017-07-07 02:27:34 +08:00
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; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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2017-05-18 15:04:48 +08:00
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%x = icmp sgt <8 x i32> %a, %b
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%res = bitcast <8 x i1> %x to i8
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ret i8 %res
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}
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define i8 @v8f32(<8 x float> %a, <8 x float> %b) {
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2017-07-07 02:27:34 +08:00
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; SSE2-LABEL: v8f32:
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; SSE2: # BB#0:
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; SSE2-NEXT: cmpltps %xmm1, %xmm3
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; SSE2-NEXT: cmpltps %xmm0, %xmm2
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; SSE2-NEXT: packsswb %xmm3, %xmm2
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
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; SSE2-NEXT: packuswb %xmm2, %xmm2
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; SSE2-NEXT: pmovmskb %xmm2, %eax
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; SSE2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: v8f32:
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; SSSE3: # BB#0:
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; SSSE3-NEXT: cmpltps %xmm1, %xmm3
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; SSSE3-NEXT: cmpltps %xmm0, %xmm2
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; SSSE3-NEXT: packsswb %xmm3, %xmm2
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; SSSE3-NEXT: pshufb {{.*#+}} xmm2 = xmm2[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; SSSE3-NEXT: pmovmskb %xmm2, %eax
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; SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; SSSE3-NEXT: retq
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;
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2017-09-19 01:58:31 +08:00
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; AVX12-LABEL: v8f32:
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; AVX12: # BB#0:
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; AVX12-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
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; AVX12-NEXT: vmovmskps %ymm0, %eax
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; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; AVX12-NEXT: vzeroupper
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; AVX12-NEXT: retq
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2017-05-18 15:04:48 +08:00
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;
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; AVX512-LABEL: v8f32:
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2017-07-07 02:27:34 +08:00
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; AVX512: # BB#0:
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2017-05-18 15:04:48 +08:00
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; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %k0
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; AVX512-NEXT: kmovd %k0, %eax
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2017-07-07 02:27:34 +08:00
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; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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2017-05-18 15:04:48 +08:00
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%x = fcmp ogt <8 x float> %a, %b
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%res = bitcast <8 x i1> %x to i8
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ret i8 %res
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}
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define i32 @v32i8(<32 x i8> %a, <32 x i8> %b) {
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2017-07-07 02:27:34 +08:00
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; SSE2-SSSE3-LABEL: v32i8:
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; SSE2-SSSE3: # BB#0:
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; SSE2-SSSE3-NEXT: pcmpgtb %xmm2, %xmm0
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2017-07-21 17:58:50 +08:00
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; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %ecx
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; SSE2-SSSE3-NEXT: pcmpgtb %xmm3, %xmm1
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; SSE2-SSSE3-NEXT: pmovmskb %xmm1, %eax
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; SSE2-SSSE3-NEXT: shll $16, %eax
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2017-07-07 02:27:34 +08:00
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; SSE2-SSSE3-NEXT: orl %ecx, %eax
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; SSE2-SSSE3-NEXT: retq
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;
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; AVX1-LABEL: v32i8:
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; AVX1: # BB#0:
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2017-07-21 17:58:50 +08:00
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; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm2
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; AVX1-NEXT: vpmovmskb %xmm2, %ecx
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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2017-07-07 02:27:34 +08:00
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; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
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2017-07-21 17:58:50 +08:00
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; AVX1-NEXT: vpmovmskb %xmm0, %eax
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; AVX1-NEXT: shll $16, %eax
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; AVX1-NEXT: orl %ecx, %eax
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2017-07-07 02:27:34 +08:00
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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2017-05-18 15:04:48 +08:00
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; AVX2-LABEL: v32i8:
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2017-07-07 02:27:34 +08:00
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; AVX2: # BB#0:
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2017-05-18 15:04:48 +08:00
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; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
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2017-06-01 19:27:57 +08:00
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; AVX2-NEXT: vpmovmskb %ymm0, %eax
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2017-05-18 15:04:48 +08:00
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: v32i8:
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2017-07-07 02:27:34 +08:00
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; AVX512: # BB#0:
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2017-05-18 15:04:48 +08:00
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; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %k0
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; AVX512-NEXT: kmovd %k0, %eax
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%x = icmp sgt <32 x i8> %a, %b
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%res = bitcast <32 x i1> %x to i32
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ret i32 %res
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}
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define i4 @v4i64(<4 x i64> %a, <4 x i64> %b) {
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2017-07-07 02:27:34 +08:00
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; SSE2-SSSE3-LABEL: v4i64:
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; SSE2-SSSE3: # BB#0:
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; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,0,2147483648,0]
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; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm3
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; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm1
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; SSE2-SSSE3-NEXT: movdqa %xmm1, %xmm5
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; SSE2-SSSE3-NEXT: pcmpgtd %xmm3, %xmm5
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; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
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; SSE2-SSSE3-NEXT: pcmpeqd %xmm3, %xmm1
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; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; SSE2-SSSE3-NEXT: pand %xmm6, %xmm1
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; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm5[1,1,3,3]
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; SSE2-SSSE3-NEXT: por %xmm1, %xmm3
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; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm2
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; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm0
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; SSE2-SSSE3-NEXT: movdqa %xmm0, %xmm1
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; SSE2-SSSE3-NEXT: pcmpgtd %xmm2, %xmm1
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; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
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; SSE2-SSSE3-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; SSE2-SSSE3-NEXT: pand %xmm4, %xmm0
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; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; SSE2-SSSE3-NEXT: por %xmm0, %xmm1
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; SSE2-SSSE3-NEXT: packsswb %xmm3, %xmm1
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; SSE2-SSSE3-NEXT: movmskps %xmm1, %eax
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; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; SSE2-SSSE3-NEXT: retq
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;
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; AVX1-LABEL: v4i64:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
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; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
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; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovmskps %xmm0, %eax
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; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
|
2017-05-18 15:04:48 +08:00
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; AVX2-LABEL: v4i64:
|
2017-07-07 02:27:34 +08:00
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; AVX2: # BB#0:
|
2017-05-18 15:04:48 +08:00
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; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
|
2017-06-01 19:27:57 +08:00
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; AVX2-NEXT: vmovmskpd %ymm0, %eax
|
2017-07-07 02:27:34 +08:00
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; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
|
2017-05-18 15:04:48 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: v4i64:
|
2017-07-07 02:27:34 +08:00
|
|
|
; AVX512: # BB#0:
|
2017-05-18 15:04:48 +08:00
|
|
|
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
|
|
|
|
; AVX512-NEXT: kmovd %k0, %eax
|
|
|
|
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
|
|
|
|
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
|
|
|
|
; AVX512-NEXT: vzeroupper
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = icmp sgt <4 x i64> %a, %b
|
|
|
|
%res = bitcast <4 x i1> %x to i4
|
|
|
|
ret i4 %res
|
|
|
|
}
|
|
|
|
|
|
|
|
define i4 @v4f64(<4 x double> %a, <4 x double> %b) {
|
2017-07-07 02:27:34 +08:00
|
|
|
; SSE2-SSSE3-LABEL: v4f64:
|
|
|
|
; SSE2-SSSE3: # BB#0:
|
|
|
|
; SSE2-SSSE3-NEXT: cmpltpd %xmm1, %xmm3
|
|
|
|
; SSE2-SSSE3-NEXT: cmpltpd %xmm0, %xmm2
|
|
|
|
; SSE2-SSSE3-NEXT: packsswb %xmm3, %xmm2
|
|
|
|
; SSE2-SSSE3-NEXT: movmskps %xmm2, %eax
|
|
|
|
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
|
|
|
|
; SSE2-SSSE3-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX1-LABEL: v4f64:
|
|
|
|
; AVX1: # BB#0:
|
|
|
|
; AVX1-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
|
|
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
|
|
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
|
|
|
|
; AVX1-NEXT: vmovmskps %xmm0, %eax
|
|
|
|
; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
|
|
|
|
; AVX1-NEXT: vzeroupper
|
|
|
|
; AVX1-NEXT: retq
|
|
|
|
;
|
2017-05-18 15:04:48 +08:00
|
|
|
; AVX2-LABEL: v4f64:
|
2017-07-07 02:27:34 +08:00
|
|
|
; AVX2: # BB#0:
|
2017-05-18 15:04:48 +08:00
|
|
|
; AVX2-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
|
2017-06-01 19:27:57 +08:00
|
|
|
; AVX2-NEXT: vmovmskpd %ymm0, %eax
|
2017-07-07 02:27:34 +08:00
|
|
|
; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
|
2017-05-18 15:04:48 +08:00
|
|
|
; AVX2-NEXT: vzeroupper
|
|
|
|
; AVX2-NEXT: retq
|
|
|
|
;
|
|
|
|
; AVX512-LABEL: v4f64:
|
2017-07-07 02:27:34 +08:00
|
|
|
; AVX512: # BB#0:
|
2017-05-18 15:04:48 +08:00
|
|
|
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %k0
|
|
|
|
; AVX512-NEXT: kmovd %k0, %eax
|
|
|
|
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
|
|
|
|
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
|
|
|
|
; AVX512-NEXT: vzeroupper
|
|
|
|
; AVX512-NEXT: retq
|
|
|
|
%x = fcmp ogt <4 x double> %a, %b
|
|
|
|
%res = bitcast <4 x i1> %x to i4
|
|
|
|
ret i4 %res
|
|
|
|
}
|