2015-03-23 14:40:37 +08:00
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// RUN: %clang_cc1 -verify -fopenmp=libiomp5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
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2015-02-05 14:35:41 +08:00
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// RUN: %clang_cc1 -fopenmp=libiomp5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp=libiomp5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
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2015-03-10 13:15:26 +08:00
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// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp=libiomp5 -fexceptions -fcxx-exceptions -gline-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
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2015-02-05 14:35:41 +08:00
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// expected-no-diagnostics
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2015-02-25 10:44:04 +08:00
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2015-02-05 14:35:41 +08:00
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#ifndef HEADER
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#define HEADER
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2015-03-23 14:18:07 +08:00
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class TestClass {
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public:
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int a;
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TestClass() : a(0) {}
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TestClass(const TestClass &C) : a(C.a) {}
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TestClass &operator=(const TestClass &) { return *this;}
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~TestClass(){};
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};
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// CHECK-DAG: [[TEST_CLASS_TY:%.+]] = type { i{{[0-9]+}} }
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2015-02-05 14:35:41 +08:00
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// CHECK: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
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2015-03-30 12:30:22 +08:00
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// CHECK: [[IMPLICIT_BARRIER_SINGLE_LOC:@.+]] = private unnamed_addr constant %{{.+}} { i32 0, i32 322, i32 0, i32 0, i8*
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2015-02-05 14:35:41 +08:00
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// CHECK: define void [[FOO:@.+]]()
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2015-03-23 14:18:07 +08:00
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TestClass tc;
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2015-04-14 13:11:24 +08:00
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TestClass tc2[2];
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#pragma omp threadprivate(tc, tc2)
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2015-03-23 14:18:07 +08:00
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2015-02-05 14:35:41 +08:00
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void foo() {}
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// CHECK-LABEL: @main
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2015-03-10 13:15:26 +08:00
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// TERM_DEBUG-LABEL: @main
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2015-02-05 14:35:41 +08:00
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int main() {
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2015-03-23 14:18:07 +08:00
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// CHECK-DAG: [[A_ADDR:%.+]] = alloca i8
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2015-04-14 13:11:24 +08:00
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// CHECK-DAG: [[A2_ADDR:%.+]] = alloca [2 x i8]
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2015-03-23 14:18:07 +08:00
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// CHECK-DAG: [[C_ADDR:%.+]] = alloca [[TEST_CLASS_TY]]
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2015-02-05 14:35:41 +08:00
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char a;
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2015-04-14 13:11:24 +08:00
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char a2[2];
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2015-03-23 14:18:07 +08:00
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TestClass c;
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2015-02-05 14:35:41 +08:00
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:@.+]])
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2015-03-23 14:18:07 +08:00
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// CHECK-DAG: [[DID_IT:%.+]] = alloca i32,
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2015-04-14 13:11:24 +08:00
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// CHECK-DAG: [[COPY_LIST:%.+]] = alloca [5 x i8*],
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2015-03-23 14:18:07 +08:00
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// CHECK: store i32 0, i32* [[DID_IT]]
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2015-02-05 14:35:41 +08:00
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// CHECK: [[RES:%.+]] = call i32 @__kmpc_single([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: [[IS_SINGLE:%.+]] = icmp ne i32 [[RES]], 0
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// CHECK-NEXT: br i1 [[IS_SINGLE]], label {{%?}}[[THEN:.+]], label {{%?}}[[EXIT:.+]]
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// CHECK: [[THEN]]
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// CHECK-NEXT: store i8 2, i8* [[A_ADDR]]
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// CHECK-NEXT: call void @__kmpc_end_single([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: br label {{%?}}[[EXIT]]
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// CHECK: [[EXIT]]
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2015-04-24 12:00:39 +08:00
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// CHECK-NOT: call {{.+}} @__kmpc_cancel_barrier
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2015-03-23 14:18:07 +08:00
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#pragma omp single nowait
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2015-02-05 14:35:41 +08:00
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a = 2;
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// CHECK: [[RES:%.+]] = call i32 @__kmpc_single([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: [[IS_SINGLE:%.+]] = icmp ne i32 [[RES]], 0
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// CHECK-NEXT: br i1 [[IS_SINGLE]], label {{%?}}[[THEN:.+]], label {{%?}}[[EXIT:.+]]
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// CHECK: [[THEN]]
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2015-04-24 12:00:39 +08:00
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// CHECK-NEXT: store i8 2, i8* [[A_ADDR]]
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// CHECK-NEXT: call void @__kmpc_end_single([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: br label {{%?}}[[EXIT]]
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// CHECK: [[EXIT]]
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// CHECK: call{{.*}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_SINGLE_LOC]], i32 [[GTID]])
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#pragma omp single
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a = 2;
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// CHECK: [[RES:%.+]] = call i32 @__kmpc_single([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: [[IS_SINGLE:%.+]] = icmp ne i32 [[RES]], 0
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// CHECK-NEXT: br i1 [[IS_SINGLE]], label {{%?}}[[THEN:.+]], label {{%?}}[[EXIT:.+]]
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// CHECK: [[THEN]]
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2015-03-10 13:15:26 +08:00
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// CHECK-NEXT: invoke void [[FOO]]()
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2015-03-23 14:18:07 +08:00
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// CHECK: to label {{%?}}[[CONT:.+]] unwind
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// CHECK: [[CONT]]
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// CHECK: store i32 1, i32* [[DID_IT]]
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2015-03-10 13:15:26 +08:00
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// CHECK: call void @__kmpc_end_single([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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2015-02-05 14:35:41 +08:00
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// CHECK-NEXT: br label {{%?}}[[EXIT]]
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// CHECK: [[EXIT]]
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2015-04-14 13:11:24 +08:00
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// CHECK: [[A_PTR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[COPY_LIST]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
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2015-03-23 14:18:07 +08:00
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// CHECK: store i8* [[A_ADDR]], i8** [[A_PTR_REF]],
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2015-04-14 13:11:24 +08:00
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// CHECK: [[C_PTR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[COPY_LIST]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
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2015-03-23 14:18:07 +08:00
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// CHECK: [[C_PTR_REF_VOID_PTR:%.+]] = bitcast [[TEST_CLASS_TY]]* [[C_ADDR]] to i8*
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// CHECK: store i8* [[C_PTR_REF_VOID_PTR]], i8** [[C_PTR_REF]],
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2015-04-14 13:11:24 +08:00
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// CHECK: [[TC_PTR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[COPY_LIST]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
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2015-03-23 14:18:07 +08:00
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// CHECK: [[TC_THREADPRIVATE_ADDR_VOID_PTR:%.+]] = call{{.*}} i8* @__kmpc_threadprivate_cached
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// CHECK: [[TC_THREADPRIVATE_ADDR:%.+]] = bitcast i8* [[TC_THREADPRIVATE_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]*
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// CHECK: [[TC_PTR_REF_VOID_PTR:%.+]] = bitcast [[TEST_CLASS_TY]]* [[TC_THREADPRIVATE_ADDR]] to i8*
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// CHECK: store i8* [[TC_PTR_REF_VOID_PTR]], i8** [[TC_PTR_REF]],
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2015-04-14 13:11:24 +08:00
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// CHECK: [[A2_PTR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[COPY_LIST]], i{{[0-9]+}} 0, i{{[0-9]+}} 3
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// CHECK: [[BITCAST:%.+]] = bitcast [2 x i8]* [[A2_ADDR]] to i8*
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// CHECK: store i8* [[BITCAST]], i8** [[A2_PTR_REF]],
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// CHECK: [[TC2_PTR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[COPY_LIST]], i{{[0-9]+}} 0, i{{[0-9]+}} 4
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// CHECK: [[TC2_THREADPRIVATE_ADDR_VOID_PTR:%.+]] = call{{.*}} i8* @__kmpc_threadprivate_cached
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// CHECK: [[TC2_THREADPRIVATE_ADDR:%.+]] = bitcast i8* [[TC2_THREADPRIVATE_ADDR_VOID_PTR]] to [2 x [[TEST_CLASS_TY]]]*
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// CHECK: [[TC2_PTR_REF_VOID_PTR:%.+]] = bitcast [2 x [[TEST_CLASS_TY]]]* [[TC2_THREADPRIVATE_ADDR]] to i8*
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// CHECK: store i8* [[TC2_PTR_REF_VOID_PTR]], i8** [[TC2_PTR_REF]],
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// CHECK: [[COPY_LIST_VOID_PTR:%.+]] = bitcast [5 x i8*]* [[COPY_LIST]] to i8*
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2015-03-23 14:18:07 +08:00
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// CHECK: [[DID_IT_VAL:%.+]] = load i32, i32* [[DID_IT]],
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2015-04-14 13:11:24 +08:00
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// CHECK: call void @__kmpc_copyprivate([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 40, i8* [[COPY_LIST_VOID_PTR]], void (i8*, i8*)* [[COPY_FUNC:@.+]], i32 [[DID_IT_VAL]])
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2015-04-24 12:00:39 +08:00
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// CHECK-NOT: call {{.+}} @__kmpc_cancel_barrier
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2015-04-14 13:11:24 +08:00
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#pragma omp single copyprivate(a, c, tc, a2, tc2)
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2015-02-05 14:35:41 +08:00
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foo();
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// CHECK-NOT: call i32 @__kmpc_single
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// CHECK-NOT: call void @__kmpc_end_single
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return a;
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}
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2015-03-23 14:18:07 +08:00
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// CHECK: void [[COPY_FUNC]](i8*, i8*)
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// CHECK: store i8* %0, i8** [[DST_ADDR_REF:%.+]],
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// CHECK: store i8* %1, i8** [[SRC_ADDR_REF:%.+]],
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// CHECK: [[DST_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[DST_ADDR_REF]],
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2015-04-14 13:11:24 +08:00
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// CHECK: [[DST_ADDR:%.+]] = bitcast i8* [[DST_ADDR_VOID_PTR]] to [5 x i8*]*
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2015-03-23 14:18:07 +08:00
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// CHECK: [[SRC_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[SRC_ADDR_REF]],
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2015-04-14 13:11:24 +08:00
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// CHECK: [[SRC_ADDR:%.+]] = bitcast i8* [[SRC_ADDR_VOID_PTR]] to [5 x i8*]*
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// CHECK: [[DST_A_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DST_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
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2015-03-23 14:18:07 +08:00
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// CHECK: [[DST_A_ADDR:%.+]] = load i8*, i8** [[DST_A_ADDR_REF]],
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2015-04-14 13:11:24 +08:00
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// CHECK: [[SRC_A_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
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// CHECK: [[SRC_A_ADDR:%.+]] = load i8*, i8** [[SRC_A_ADDR_REF]],
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2015-03-23 14:18:07 +08:00
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// CHECK: [[SRC_A_VAL:%.+]] = load i8, i8* [[SRC_A_ADDR]],
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// CHECK: store i8 [[SRC_A_VAL]], i8* [[DST_A_ADDR]],
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2015-04-14 13:11:24 +08:00
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// CHECK: [[DST_C_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DST_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
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// CHECK: [[DST_C_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[DST_C_ADDR_REF]],
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// CHECK: [[DST_C_ADDR:%.+]] = bitcast i8* [[DST_C_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]*
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// CHECK: [[SRC_C_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
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// CHECK: [[SRC_C_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[SRC_C_ADDR_REF]],
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// CHECK: [[SRC_C_ADDR:%.+]] = bitcast i8* [[SRC_C_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]*
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2015-03-23 14:18:07 +08:00
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// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN:@.+]]([[TEST_CLASS_TY]]* [[DST_C_ADDR]], [[TEST_CLASS_TY]]* {{.*}}[[SRC_C_ADDR]])
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2015-04-14 13:11:24 +08:00
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// CHECK: [[DST_TC_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DST_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
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// CHECK: [[DST_TC_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[DST_TC_ADDR_REF]],
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// CHECK: [[DST_TC_ADDR:%.+]] = bitcast i8* [[DST_TC_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]*
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// CHECK: [[SRC_TC_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
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// CHECK: [[SRC_TC_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[SRC_TC_ADDR_REF]],
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// CHECK: [[SRC_TC_ADDR:%.+]] = bitcast i8* [[SRC_TC_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]*
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// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN]]([[TEST_CLASS_TY]]* [[DST_TC_ADDR]], [[TEST_CLASS_TY]]* {{.*}}[[SRC_TC_ADDR]])
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// CHECK: [[DST_A2_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DST_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 3
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// CHECK: [[DST_A2_ADDR:%.+]] = load i8*, i8** [[DST_A2_ADDR_REF]],
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// CHECK: [[SRC_A2_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 3
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// CHECK: [[SRC_A2_ADDR:%.+]] = load i8*, i8** [[SRC_A2_ADDR_REF]],
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// CHECK: call void @llvm.memcpy.{{.+}}(i8* [[DST_A2_ADDR]], i8* [[SRC_A2_ADDR]], i{{[0-9]+}} 2, i{{[0-9]+}} 1, i1 false)
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// CHECK: [[DST_TC2_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DST_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 4
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// CHECK: [[DST_TC2_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[DST_TC2_ADDR_REF]],
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// CHECK: [[DST_TC2_ADDR:%.+]] = bitcast i8* [[DST_TC2_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]*
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// CHECK: [[SRC_TC2_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 4
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// CHECK: [[SRC_TC2_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[SRC_TC2_ADDR_REF]],
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// CHECK: [[SRC_TC2_ADDR:%.+]] = bitcast i8* [[SRC_TC2_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]*
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// CHECK: br i1
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// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN]]([[TEST_CLASS_TY]]* %{{.+}}, [[TEST_CLASS_TY]]* {{.*}})
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// CHECK: br i1
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2015-03-23 14:18:07 +08:00
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// CHECK: ret void
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2015-03-10 13:15:26 +08:00
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// CHECK-LABEL: parallel_single
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// TERM_DEBUG-LABEL: parallel_single
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void parallel_single() {
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2015-02-26 18:27:34 +08:00
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#pragma omp parallel
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#pragma omp single
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2015-03-10 13:15:26 +08:00
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// TERM_DEBUG-NOT: __kmpc_global_thread_num
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// TERM_DEBUG: call i32 @__kmpc_single({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]]
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// TERM_DEBUG: invoke void {{.*}}foo{{.*}}()
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// TERM_DEBUG: unwind label %[[TERM_LPAD:.+]],
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// TERM_DEBUG-NOT: __kmpc_global_thread_num
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// TERM_DEBUG: call void @__kmpc_end_single({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]]
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2015-03-10 13:28:46 +08:00
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// TERM_DEBUG: [[TERM_LPAD]]
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2015-03-10 13:15:26 +08:00
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// TERM_DEBUG: call void @__clang_call_terminate
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// TERM_DEBUG: unreachable
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foo();
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2015-02-26 18:27:34 +08:00
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}
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2015-03-23 14:18:07 +08:00
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// TERM_DEBUG-DAG: [[DBG_LOC_START]] = !MDLocation(line: [[@LINE-12]],
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2015-04-10 12:50:10 +08:00
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// TERM_DEBUG-DAG: [[DBG_LOC_END]] = !MDLocation(line: [[@LINE-3]],
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2015-02-26 18:27:34 +08:00
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2015-02-05 14:35:41 +08:00
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#endif
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