forked from OSchip/llvm-project
35 lines
1.4 KiB
LLVM
35 lines
1.4 KiB
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; Check that this testcase compiles successfully.
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; Because l2fetch has mayLoad/mayStore flags on it, the packetizer
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; was tricked into thinking that it's a store. The v65-specific
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; code dealing with mem_shuff allowed it to be packetized together
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; with the load.
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; CHECK: l2fetch
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target triple = "hexagon"
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@g0 = external global [32768 x i8], align 8
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@g1 = external local_unnamed_addr global [15 x i8*], align 8
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; Function Attrs: nounwind
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define void @f0() local_unnamed_addr #0 {
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b0:
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store i8* inttoptr (i32 and (i32 sext (i8 ptrtoint (i8* getelementptr inbounds ([32768 x i8], [32768 x i8]* @g0, i32 0, i32 10000) to i8) to i32), i32 -65536) to i8*), i8** getelementptr inbounds ([15 x i8*], [15 x i8*]* @g1, i32 0, i32 1), align 4
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store i8* inttoptr (i32 and (i32 sext (i8 ptrtoint (i8* getelementptr inbounds ([32768 x i8], [32768 x i8]* @g0, i32 0, i32 10000) to i8) to i32), i32 -65536) to i8*), i8** getelementptr inbounds ([15 x i8*], [15 x i8*]* @g1, i32 0, i32 6), align 8
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tail call void @f1()
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%v0 = load i8*, i8** getelementptr inbounds ([15 x i8*], [15 x i8*]* @g1, i32 0, i32 0), align 8
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tail call void @llvm.hexagon.Y5.l2fetch(i8* %v0, i64 -9223372036854775808)
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.hexagon.Y5.l2fetch(i8*, i64) #1
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; Function Attrs: nounwind
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declare void @f1() #1
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attributes #0 = { nounwind "target-cpu"="hexagonv65" }
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attributes #1 = { nounwind }
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