forked from OSchip/llvm-project
21 lines
529 B
LLVM
21 lines
529 B
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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target triple = "hexagon"
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; CHECK-LABEL: f0:
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; CHECK: memw({{.*}}) = clrbit(#18)
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define void @f0(i32* nocapture %a0) #0 {
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b0:
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%v0 = load i32, i32* %a0, align 4, !tbaa !0
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%v1 = and i32 %v0, -262145
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store i32 %v1, i32* %a0, align 4, !tbaa !0
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ret void
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}
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attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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