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llvm-project/llvm/test/CodeGen/WebAssembly/load.ll

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WebAssembly: generate load/store Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now. Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff llvm-svn: 246500
2015-09-01 06:24:11 +08:00
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that basic loads are assembled properly.
[WebAssembly] Update target datalayout strings. llvm-svn: 247187
2015-09-10 04:54:31 +08:00
target datalayout = "e-p:32:32-i64:64-n32:64-S128"
WebAssembly: generate load/store Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now. Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff llvm-svn: 246500
2015-09-01 06:24:11 +08:00
target triple = "wasm32-unknown-unknown"
[WebAssembly] Switch to a more traditional assembly syntax This new syntax is built around putting each instruction on its own line in a "mnemonic op, op, op" like syntax. It also uses conventional data section directives like ".byte" and so on rather than requiring everything to be in hierarchical S-expression format. This is a more natural syntax for a ".s" file format from the perspective of LLVM MC and related tools, while remaining easy to translate into other forms as needed. llvm-svn: 249364
2015-10-06 08:27:55 +08:00
; CHECK-LABEL: ldi32:
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
[WebAssembly] Support constant offsets on loads and stores This is just prototype for load/store for i32 types. I'll add them to the rest of the types if we like this direction. Differential Revision: http://reviews.llvm.org/D15197 llvm-svn: 254807
2015-12-05 08:26:39 +08:00
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
[WebAssembly] Support for register stackifying with load and store instructions. llvm-svn: 254076
2015-11-26 00:55:01 +08:00
; CHECK-NEXT: return $pop[[NUM]]{{$}}
WebAssembly: generate load/store Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now. Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff llvm-svn: 246500
2015-09-01 06:24:11 +08:00
define i32 @ldi32(i32 *%p) {
%v = load i32, i32* %p
ret i32 %v
}
[WebAssembly] Switch to a more traditional assembly syntax This new syntax is built around putting each instruction on its own line in a "mnemonic op, op, op" like syntax. It also uses conventional data section directives like ".byte" and so on rather than requiring everything to be in hierarchical S-expression format. This is a more natural syntax for a ".s" file format from the perspective of LLVM MC and related tools, while remaining easy to translate into other forms as needed. llvm-svn: 249364
2015-10-06 08:27:55 +08:00
; CHECK-LABEL: ldi64:
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}}
[WebAssembly] Support constant offsets on loads and stores This is just prototype for load/store for i32 types. I'll add them to the rest of the types if we like this direction. Differential Revision: http://reviews.llvm.org/D15197 llvm-svn: 254807
2015-12-05 08:26:39 +08:00
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
[WebAssembly] Support for register stackifying with load and store instructions. llvm-svn: 254076
2015-11-26 00:55:01 +08:00
; CHECK-NEXT: return $pop[[NUM]]{{$}}
WebAssembly: generate load/store Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now. Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff llvm-svn: 246500
2015-09-01 06:24:11 +08:00
define i64 @ldi64(i64 *%p) {
%v = load i64, i64* %p
ret i64 %v
}
[WebAssembly] Switch to a more traditional assembly syntax This new syntax is built around putting each instruction on its own line in a "mnemonic op, op, op" like syntax. It also uses conventional data section directives like ".byte" and so on rather than requiring everything to be in hierarchical S-expression format. This is a more natural syntax for a ".s" file format from the perspective of LLVM MC and related tools, while remaining easy to translate into other forms as needed. llvm-svn: 249364
2015-10-06 08:27:55 +08:00
; CHECK-LABEL: ldf32:
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f32{{$}}
[WebAssembly] Support constant offsets on loads and stores This is just prototype for load/store for i32 types. I'll add them to the rest of the types if we like this direction. Differential Revision: http://reviews.llvm.org/D15197 llvm-svn: 254807
2015-12-05 08:26:39 +08:00
; CHECK-NEXT: f32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
[WebAssembly] Support for register stackifying with load and store instructions. llvm-svn: 254076
2015-11-26 00:55:01 +08:00
; CHECK-NEXT: return $pop[[NUM]]{{$}}
WebAssembly: generate load/store Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now. Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff llvm-svn: 246500
2015-09-01 06:24:11 +08:00
define float @ldf32(float *%p) {
%v = load float, float* %p
ret float %v
}
[WebAssembly] Switch to a more traditional assembly syntax This new syntax is built around putting each instruction on its own line in a "mnemonic op, op, op" like syntax. It also uses conventional data section directives like ".byte" and so on rather than requiring everything to be in hierarchical S-expression format. This is a more natural syntax for a ".s" file format from the perspective of LLVM MC and related tools, while remaining easy to translate into other forms as needed. llvm-svn: 249364
2015-10-06 08:27:55 +08:00
; CHECK-LABEL: ldf64:
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f64{{$}}
[WebAssembly] Support constant offsets on loads and stores This is just prototype for load/store for i32 types. I'll add them to the rest of the types if we like this direction. Differential Revision: http://reviews.llvm.org/D15197 llvm-svn: 254807
2015-12-05 08:26:39 +08:00
; CHECK-NEXT: f64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
[WebAssembly] Support for register stackifying with load and store instructions. llvm-svn: 254076
2015-11-26 00:55:01 +08:00
; CHECK-NEXT: return $pop[[NUM]]{{$}}
WebAssembly: generate load/store Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now. Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff llvm-svn: 246500
2015-09-01 06:24:11 +08:00
define double @ldf64(double *%p) {
%v = load double, double* %p
ret double %v
}