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llvm-project/llvm/test/CodeGen/X86/vec_set-8.ll

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[X86][SSE] Regenerated the vec_set tests. Replaced lots of dodgy greps with actual codegen llvm-svn: 265163
2016-04-02 01:40:25 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets llvm-svn: 302683
2017-05-10 23:52:59 +08:00
; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
One readme entry is done, one is really easy (Evan, want to investigate eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn may be done (if shufps is better than pinsw, Evan, please review), and we already know about LICM of simple instructions. llvm-svn: 45407
2007-12-30 03:31:47 +08:00
define <2 x i64> @test(i64 %i) nounwind {
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets llvm-svn: 302683
2017-05-10 23:52:59 +08:00
; X86-LABEL: test:
; X86: # BB#0:
; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; X86-NEXT: retl
;
; X64-LABEL: test:
; X64: # BB#0:
; X64-NEXT: movq %rdi, %xmm0
; X64-NEXT: retq
[X86][SSE] Regenerated the vec_set tests. Replaced lots of dodgy greps with actual codegen llvm-svn: 265163
2016-04-02 01:40:25 +08:00
%tmp10 = insertelement <2 x i64> undef, i64 %i, i32 0
%tmp11 = insertelement <2 x i64> %tmp10, i64 0, i32 1
ret <2 x i64> %tmp11
One readme entry is done, one is really easy (Evan, want to investigate eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn may be done (if shufps is better than pinsw, Evan, please review), and we already know about LICM of simple instructions. llvm-svn: 45407
2007-12-30 03:31:47 +08:00
}