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llvm-project/llvm/test/CodeGen/Mips/tls.ll

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Drop support for Mips1 and Mips2. llvm-svn: 139405
2011-09-10 04:45:50 +08:00
; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=PIC
; RUN: llc -march=mipsel -relocation-model=static < %s \
This patch implements the thread local storage. Implemented are General Dynamic, Initial Exec and Local Exec TLS models. Patch by Sasa Stankovic llvm-svn: 132322
2011-05-31 10:53:58 +08:00
; RUN: | FileCheck %s -check-prefix=STATIC
Add an option to use a virtual register as the global base register instead of reserving a physical register ($gp or $28) for that purpose. This will completely eliminate loads that restore the value of $gp after every function call, if the register allocator assigns a callee-saved register, or eliminate unnecessary loads if it assigns a temporary register. example: .cpload $25 // set $gp. ... .cprestore 16 // store $gp to stack slot 16($sp). ... jalr $25 // function call. clobbers $gp. lw $gp, 16($sp) // not emitted if callee-saved reg is chosen. ... lw $2, 4($gp) ... jalr $25 // function call. lw $gp, 16($sp) // not emitted if $gp is not live after this instruction. ... llvm-svn: 151402
2012-02-25 06:34:47 +08:00
; RUN: llc -march=mipsel -relocation-model=static < %s \
; RUN: -mips-fix-global-base-reg=false | FileCheck %s -check-prefix=STATICGP
This patch implements the thread local storage. Implemented are General Dynamic, Initial Exec and Local Exec TLS models. Patch by Sasa Stankovic llvm-svn: 132322
2011-05-31 10:53:58 +08:00
@t1 = thread_local global i32 0, align 4
define i32 @f1() nounwind {
entry:
%tmp = load i32* @t1, align 4
ret i32 %tmp
; CHECK: f1:
; PIC: lw $25, %call16(__tls_get_addr)($gp)
; PIC: addiu $4, $gp, %tlsgd(t1)
; PIC: jalr $25
; PIC: lw $2, 0($2)
; STATIC: rdhwr $3, $29
; STATIC: lui $[[R0:[0-9]+]], %tprel_hi(t1)
; STATIC: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
; STATIC: addu $[[R2:[0-9]+]], $3, $[[R1]]
; STATIC: lw $2, 0($[[R2]])
}
@t2 = external thread_local global i32
define i32 @f2() nounwind {
entry:
%tmp = load i32* @t2, align 4
ret i32 %tmp
; CHECK: f2:
; PIC: lw $25, %call16(__tls_get_addr)($gp)
; PIC: addiu $4, $gp, %tlsgd(t2)
; PIC: jalr $25
; PIC: lw $2, 0($2)
Add an option to use a virtual register as the global base register instead of reserving a physical register ($gp or $28) for that purpose. This will completely eliminate loads that restore the value of $gp after every function call, if the register allocator assigns a callee-saved register, or eliminate unnecessary loads if it assigns a temporary register. example: .cpload $25 // set $gp. ... .cprestore 16 // store $gp to stack slot 16($sp). ... jalr $25 // function call. clobbers $gp. lw $gp, 16($sp) // not emitted if callee-saved reg is chosen. ... lw $2, 4($gp) ... jalr $25 // function call. lw $gp, 16($sp) // not emitted if $gp is not live after this instruction. ... llvm-svn: 151402
2012-02-25 06:34:47 +08:00
; STATICGP: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
; STATICGP: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
; STATICGP: lw ${{[0-9]+}}, %gottprel(t2)($[[GP]])
Insert instructions to the entry basic block which initializes the global pointer register. This is the first of the series of patches which clean up the way global pointer register is used. The patches will make the following improvements: - Make $gp an allocatable temporary register rather than reserving it. - Use a virtual register as the global pointer register and let the register allocator decide which register to assign to it or whether spill/reloads are needed. - Make sure $gp is valid at the entry of a called function, which is necessary for functions using lazy binding. - Remove the need for emitting .cprestore and .cpload directives. llvm-svn: 156671
2012-05-12 08:17:17 +08:00
; STATIC: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
; STATIC: addiu ${{[a-z0-9]+}}, $[[R0]], %lo(__gnu_local_gp)
This patch implements the thread local storage. Implemented are General Dynamic, Initial Exec and Local Exec TLS models. Patch by Sasa Stankovic llvm-svn: 132322
2011-05-31 10:53:58 +08:00
; STATIC: rdhwr $3, $29
; STATIC: lw $[[R0:[0-9]+]], %gottprel(t2)($gp)
; STATIC: addu $[[R1:[0-9]+]], $3, $[[R0]]
; STATIC: lw $2, 0($[[R1]])
}
Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object emission is not supported yet, but a patch that adds the support should follow soon. llvm-svn: 146572
2011-12-15 02:26:41 +08:00
@f3.i = internal thread_local unnamed_addr global i32 1, align 4
define i32 @f3() nounwind {
entry:
; CHECK: f3:
; PIC: addiu $4, $gp, %tlsldm(f3.i)
; PIC: jalr $25
; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
; PIC: addu $[[R1:[0-9]+]], $[[R0]], $2
Remove the restriction on the first operand of the add node in SelectAddr. This change reduces the number of instructions generated. For example, (load (add (sub $n0, $n1), (MipsLo got(s)))) results in the following sequence of instructions: 1. sub $n2, $n0, $n1 2. lw got(s)($n2) Previously, three instructions were needed. 1. sub $n2, $n0, $n1 2. addiu $n3, $n2, got(s) 3. lw 0($n3) llvm-svn: 146888
2011-12-20 03:28:37 +08:00
; PIC: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object emission is not supported yet, but a patch that adds the support should follow soon. llvm-svn: 146572
2011-12-15 02:26:41 +08:00
%0 = load i32* @f3.i, align 4
%inc = add nsw i32 %0, 1
store i32 %inc, i32* @f3.i, align 4
ret i32 %inc
}