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llvm-project/llvm/test/CodeGen/ARM/tail-opts.ll

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Fix buildbots. llvm-svn: 89274
2009-11-19 07:30:38 +08:00
; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 -asm-verbose=false | FileCheck %s
Tail duplication still needs to iterate. Duplicating new instructions onto the tail of a block may make that block a new candidate for duplication. llvm-svn: 89264
2009-11-19 06:52:37 +08:00
declare void @bar(i32)
declare void @car(i32)
declare void @dar(i32)
declare void @ear(i32)
declare void @far(i32)
declare i1 @qux()
@GHJK = global i32 0
Delete useless trailing semicolons. llvm-svn: 92740
2010-01-06 01:55:26 +08:00
declare i8* @choose(i8*, i8*)
Tail duplication still needs to iterate. Duplicating new instructions onto the tail of a block may make that block a new candidate for duplication. llvm-svn: 89264
2009-11-19 06:52:37 +08:00
; BranchFolding should tail-duplicate the indirect jump to avoid
; redundant branching.
; CHECK: tail_duplicate_me:
; CHECK: qux
; CHECK: qux
Last round of fixes for movw + movt global address codegen. 1. Fixed ARM pc adjustment. 2. Fixed dynamic-no-pic codegen 3. CSE of pc-relative load of global addresses. It's now enabled by default for Darwin. llvm-svn: 123991
2011-01-22 02:55:51 +08:00
; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK
; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK
Tail duplication still needs to iterate. Duplicating new instructions onto the tail of a block may make that block a new candidate for duplication. llvm-svn: 89264
2009-11-19 06:52:37 +08:00
; CHECK: str r
; CHECK-NEXT: bx r
Last round of fixes for movw + movt global address codegen. 1. Fixed ARM pc adjustment. 2. Fixed dynamic-no-pic codegen 3. CSE of pc-relative load of global addresses. It's now enabled by default for Darwin. llvm-svn: 123991
2011-01-22 02:55:51 +08:00
; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK
; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK
Tail duplication still needs to iterate. Duplicating new instructions onto the tail of a block may make that block a new candidate for duplication. llvm-svn: 89264
2009-11-19 06:52:37 +08:00
; CHECK: str r
; CHECK-NEXT: bx r
Last round of fixes for movw + movt global address codegen. 1. Fixed ARM pc adjustment. 2. Fixed dynamic-no-pic codegen 3. CSE of pc-relative load of global addresses. It's now enabled by default for Darwin. llvm-svn: 123991
2011-01-22 02:55:51 +08:00
; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK
; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK
Tail duplication still needs to iterate. Duplicating new instructions onto the tail of a block may make that block a new candidate for duplication. llvm-svn: 89264
2009-11-19 06:52:37 +08:00
; CHECK: str r
; CHECK-NEXT: bx r
define void @tail_duplicate_me() nounwind {
entry:
%a = call i1 @qux()
%c = call i8* @choose(i8* blockaddress(@tail_duplicate_me, %return),
i8* blockaddress(@tail_duplicate_me, %altret))
br i1 %a, label %A, label %next
next:
%b = call i1 @qux()
br i1 %b, label %B, label %C
A:
call void @bar(i32 0)
store i32 0, i32* @GHJK
br label %M
B:
call void @car(i32 1)
store i32 0, i32* @GHJK
br label %M
C:
call void @dar(i32 2)
store i32 0, i32* @GHJK
br label %M
M:
indirectbr i8* %c, [label %return, label %altret]
return:
call void @ear(i32 1000)
ret void
altret:
call void @far(i32 1001)
ret void
}