llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir

# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s

--- |
  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
  target triple = "aarch64-apple-ios"
  define void @test_simple() {
  entry:
    ret void
  next:
    ret void
  }
...

---
name:            test_simple
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
body: |
  bb.0.entry:
    liveins: %x0, %x1, %x2, %x3
    %0(64) = COPY %x0

    ; CHECK-LABEL: name: test_simple
    ; CHECK: %1(64) = G_PTRTOINT { s64, p0 } %0
    ; CHECK: %2(64) = G_INTTOPTR { p0, s64 } %1
    %1(64) = G_PTRTOINT { s64, p0 } %0
    %2(64) = G_INTTOPTR { p0, s64 } %1

    ; CHECK: [[TST32:%[0-9]+]](32) = G_ANYEXT { s32, s1 } %3
    ; CHECK: G_BRCOND s32 [[TST32]], %bb.1.next
    %3(1) = G_TRUNC { s1, s64 } %0
    G_BRCOND s1 %3, %bb.1.next

  bb.1.next:
...