llvm-project/llvm/lib/Target/R600/Processors.td

//===-- Processors.td - R600 Processor definitions ------------------------===//
//
//                     The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//

class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features>
: Processor<Name, itin, Features>;
def : Proc<"",           R600_VLIW5_Itin,
    [FeatureR600, FeatureVertexCache]>;
def : Proc<"r600",       R600_VLIW5_Itin,
    [FeatureR600 , FeatureVertexCache]>;
def : Proc<"rs880",      R600_VLIW5_Itin,
    [FeatureR600]>;
def : Proc<"rv670",      R600_VLIW5_Itin,
    [FeatureR600, FeatureFP64, FeatureVertexCache]>;
def : Proc<"rv710",      R600_VLIW5_Itin,
    [FeatureR700, FeatureVertexCache]>;
def : Proc<"rv730",      R600_VLIW5_Itin,
    [FeatureR700, FeatureVertexCache]>;
def : Proc<"rv770",      R600_VLIW5_Itin,
    [FeatureR700, FeatureFP64, FeatureVertexCache]>;
def : Proc<"cedar",      R600_VLIW5_Itin,
    [FeatureEvergreen, FeatureVertexCache]>;
def : Proc<"redwood",    R600_VLIW5_Itin,
    [FeatureEvergreen, FeatureVertexCache]>;
def : Proc<"sumo",       R600_VLIW5_Itin,
    [FeatureEvergreen]>;
def : Proc<"juniper",    R600_VLIW5_Itin,
    [FeatureEvergreen, FeatureVertexCache]>;
def : Proc<"cypress",    R600_VLIW5_Itin,
    [FeatureEvergreen, FeatureFP64, FeatureVertexCache]>;
def : Proc<"barts",      R600_VLIW5_Itin,
    [FeatureNorthernIslands, FeatureVertexCache]>;
def : Proc<"turks",      R600_VLIW5_Itin,
    [FeatureNorthernIslands, FeatureVertexCache]>;
def : Proc<"caicos",     R600_VLIW5_Itin,
    [FeatureNorthernIslands]>;
def : Proc<"cayman",     R600_VLIW4_Itin,
    [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>;

def : Proc<"SI",         SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"tahiti",     SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"pitcairn",   SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"verde",      SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"oland",      SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"hainan",     SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"bonaire",    SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"kabini",     SI_Itin, [FeatureSouthernIslands]>;
def : Proc<"kaveri",     SI_Itin, [FeatureSouthernIslands]>;
R600: Clean up comments in Processors.td llvm-svn: 181032 2013-05-04 01:21:14 +08:00			`//===-- Processors.td - R600 Processor definitions ------------------------===//`
Add R600 backend A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915 2012-12-12 05:25:42 +08:00			`//`
			`// The LLVM Compiler Infrastructure`
			`//`
			`// This file is distributed under the University of Illinois Open Source`
			`// License. See LICENSE.TXT for details.`
			`//`
			`//===----------------------------------------------------------------------===//`

			`class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features>`
			`: Processor<Name, itin, Features>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureR600, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"r600", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureR600 , FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"rs880", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureR600]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"rv670", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureR600, FeatureFP64, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"rv710", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureR700, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"rv730", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureR700, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"rv770", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureR700, FeatureFP64, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"cedar", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureEvergreen, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"redwood", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureEvergreen, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"sumo", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureEvergreen]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"juniper", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureEvergreen, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"cypress", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureEvergreen, FeatureFP64, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"barts", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureNorthernIslands, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"turks", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureNorthernIslands, FeatureVertexCache]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"caicos", R600_VLIW5_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureNorthernIslands]>;`
R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips llvm-svn: 180759 2013-04-30 08:14:17 +08:00			`def : Proc<"cayman", R600_VLIW4_Itin,`
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`[FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>;`
R600: Fix the fetch limits for R600 generation GPUs Reviewed-by: Vincent Lejeune <vljn@ovi.com> https://bugs.freedesktop.org/show_bug.cgi?id=64257 llvm-svn: 183560 2013-06-08 04:28:55 +08:00
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566 2013-06-08 04:37:48 +08:00			`def : Proc<"SI", SI_Itin, [FeatureSouthernIslands]>;`
			`def : Proc<"tahiti", SI_Itin, [FeatureSouthernIslands]>;`
			`def : Proc<"pitcairn", SI_Itin, [FeatureSouthernIslands]>;`
			`def : Proc<"verde", SI_Itin, [FeatureSouthernIslands]>;`
			`def : Proc<"oland", SI_Itin, [FeatureSouthernIslands]>;`
			`def : Proc<"hainan", SI_Itin, [FeatureSouthernIslands]>;`
R600/SI: Add processor types for each CIK variant Patch By: Alex Deucher Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> llvm-svn: 185209 2013-06-29 04:23:29 +08:00			`def : Proc<"bonaire", SI_Itin, [FeatureSouthernIslands]>;`
			`def : Proc<"kabini", SI_Itin, [FeatureSouthernIslands]>;`
Add a newline. llvm-svn: 185385 2013-07-02 05:31:10 +08:00			`def : Proc<"kaveri", SI_Itin, [FeatureSouthernIslands]>;`