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llvm-project/llvm/test/CodeGen/X86/uint_to_fp-2.ll

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[X86][SSE] Regenerated uint2fp special case tests llvm-svn: 260888
2016-02-15 21:41:41 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[x86] Add another triple to a test to make the comment syntax stable. Should fix darwin builders. llvm-svn: 218956
2014-10-03 10:06:28 +08:00
; RUN: llc < %s -mtriple=i386-unknown-unknown -march=x86 -mattr=+sse2 | FileCheck %s
Make linear scan's trivial coalescer slightly more aggressive. llvm-svn: 62547
2009-01-20 08:16:18 +08:00
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768
2011-08-30 05:15:46 +08:00
; rdar://6504833
define float @test1(i32 %x) nounwind readnone {
[x86] Regenerate and clean up more tests is preparation for vector shufle switch. I nuked a win64 config from one test as it doesn't really make sense to cover that ABI specially for generic v2f32 tests... llvm-svn: 218948
2014-10-03 09:44:04 +08:00
; CHECK-LABEL: test1:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %eax
[X86][SSE] Regenerated uint2fp special case tests llvm-svn: 260888
2016-02-15 21:41:41 +08:00
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
[x86] Give movss and movsd execution domains in the x86 backend. This associates movss and movsd with the packed single and packed double execution domains (resp.). While this is largely cosmetic, as we now don't have weird ping-pong-ing between single and double precision, it is also useful because it avoids the domain fixing algorithm from seeing domain breaks that don't actually exist. It will also be much more important if we have an execution domain default other than packed single, as that would cause us to mix movss and movsd with integer vector code on a regular basis, a very bad mixture. llvm-svn: 228135
2015-02-04 18:58:53 +08:00
; CHECK-NEXT: orpd %xmm0, %xmm1
[x86] Regenerate and clean up more tests is preparation for vector shufle switch. I nuked a win64 config from one test as it doesn't really make sense to cover that ABI specially for generic v2f32 tests... llvm-svn: 218948
2014-10-03 09:44:04 +08:00
; CHECK-NEXT: subsd %xmm0, %xmm1
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: cvtsd2ss %xmm1, %xmm0
; CHECK-NEXT: movss %xmm0, (%esp)
; CHECK-NEXT: flds (%esp)
; CHECK-NEXT: popl %eax
; CHECK-NEXT: retl
Make linear scan's trivial coalescer slightly more aggressive. llvm-svn: 62547
2009-01-20 08:16:18 +08:00
entry:
[X86][SSE] Regenerated uint2fp special case tests llvm-svn: 260888
2016-02-15 21:41:41 +08:00
%0 = uitofp i32 %x to float
ret float %0
Make linear scan's trivial coalescer slightly more aggressive. llvm-svn: 62547
2009-01-20 08:16:18 +08:00
}
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768
2011-08-30 05:15:46 +08:00
; PR10802
define float @test2(<4 x i32> %x) nounwind readnone ssp {
[x86] Regenerate and clean up more tests is preparation for vector shufle switch. I nuked a win64 config from one test as it doesn't really make sense to cover that ABI specially for generic v2f32 tests... llvm-svn: 218948
2014-10-03 09:44:04 +08:00
; CHECK-LABEL: test2:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: xorps %xmm1, %xmm1
[X86][SSE] Regenerated uint2fp special case tests llvm-svn: 260888
2016-02-15 21:41:41 +08:00
; CHECK-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
[x86] Regenerate and clean up more tests is preparation for vector shufle switch. I nuked a win64 config from one test as it doesn't really make sense to cover that ABI specially for generic v2f32 tests... llvm-svn: 218948
2014-10-03 09:44:04 +08:00
; CHECK-NEXT: orps %xmm0, %xmm1
; CHECK-NEXT: subsd %xmm0, %xmm1
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: cvtsd2ss %xmm1, %xmm0
; CHECK-NEXT: movss %xmm0, (%esp)
; CHECK-NEXT: flds (%esp)
; CHECK-NEXT: popl %eax
; CHECK-NEXT: retl
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768
2011-08-30 05:15:46 +08:00
entry:
%vecext = extractelement <4 x i32> %x, i32 0
%conv = uitofp i32 %vecext to float
ret float %conv
}